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IN74HC573 Datasheet, PDF (4/5 Pages) Integral Corp. – Octal 3-State Noninverting Transparent Latch
IN74HC573A
AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)
Symbol
Parameter
VCC
Guaranteed Limit
V 25 °C ≤85°C ≤125°C Unit
to
-55°C
tPLH, tPHL Maximum Propagation Delay, Input D to Q
(Figures 1 and 5)
2.0 150
190
225
ns
4.5 30
38
45
6.0 26
33
38
tPLH, tPHL Maximum Propagation Delay,Latch Enable
to Q (Figures 2 and 5)
2.0 160
200
240
ns
4.5 32
40
48
6.0 27
34
41
tPLZ, tPHZ Maximum Propagation Delay, Output Enable to Q 2.0 150
190
225
ns
(Figures 3 and 6)
4.5 30
38
45
6.0 26
33
38
tPZH, tPZL Maximum Propagation Delay, Output Enable to Q 2.0 150
190
225
ns
(Figures 3 and 6)
4.5 30
38
45
6.0 26
33
38
tTLH, tTHL Maximum Output Transition Time, Any Output
2.0
60
75
90
ns
(Figures 1 and 5)
4.5 12
15
18
6.0 10
13
15
CIN
COUT
Maximum Input Capacitance
Maximum Three-State Output Capacitance
(Output in High-Impedance State)
-
10
10
10
pF
-
15
15
15
pF
Power Dissipation Capacitance (Per Enabled
Output)
CPD Used to determine the no-load dynamic power
consumption: PD=CPDVCC2f+ICCVCC
Typical @25°C,VCC=5.0 V
23
TIMING REQUIREMENTS (CL=50pF,Input tr=tf=6.0 ns)
VCC
Symbol
Parameter
V
tSU
Minimum Setup Time, Input D 2.0
to Latch Enable
4.5
(Figure 4)
6.0
th
Minimum Hold Time, Latch
2.0
Enable to Input D
4.5
(Figure 4)
6.0
tw
Minimum Pulse Width, Latch 2.0
Enable (Figure 2)
4.5
6.0
tr, tf Maximum Input Rise and Fall 2.0
Times (Figure 1)
4.5
6.0
Guaranteed Limit
25 °C to
-55°C
≤85°C
≤125°C
50
65
75
10
13
15
9
11
13
5
5
5
5
5
5
5
5
5
75
95
110
15
19
22
13
16
19
1000
500
400
1000
500
400
1000
500
400
pF
Unit
ns
ns
ns
ns
406