English
Language : 

IA88C00 Datasheet, PDF (30/80 Pages) InnovASIC, Inc – Microcontroller
IA88C00
Microcontroller
Data Sheet
As of Production Version -01
Figure 26. Counter 1 Capture Register (Low Byte) (C1CL), R229 Bank 0
Bit
7
6
5
4
3
2
1
0
D7
D6
D5
D4
D3
D2
D1
D0
C1C7 – C1C0
Initial Value X
X
X
X
X
X
X
X
Read/Write R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
This 16-bit register pair is used to hold the counter value saved when using the "capture on external
event" function. This register will capture at the rising edge of the I/O pin or when software capture is
asserted. When the bi-value mode of operation is enabled, this register is used as a second Time Constant
register and the counter is alternately loaded from each.
Figure 27a. Counter 0 Prescaler (CTPRS), R230 Bank 0
Bit
7
6
5
D7
D6
D5
CT1
Initial Value 0
0
1
Read/Write R/W
R/W
R/W
4
3
D4
D3
Not Used
0
0
R/W
R/W
2
1
0
D2
D1
D0
CT0
0
0
1
R/W
R/W
R/W
This register controls the source of the timer signal when in internal mode. An 8-bit prescaler for each
counter is implemented. The control bit operate as follows:
CT0/CT1
000
001
010
011
100
101
110
111
Prescale
XTAL/2
XTAL/4
XTAL/8
XTAL/16
XTAL/32
XTAL/64
XTAL/128
XTAL/256
Only the prescaler of CT1 is activated when the counters are cascaded.
Copyright © 2005
Innovasic.com
Innovasic Semiconductor
ENG 21 0 050519-00
Page 30 of 80
www.Innovasic
1.888.824.4184