V23814-U1306-M136 Datasheet, PDF (9/29 Pages) Infineon Technologies AG – PAROLI Tx AC, 1.6 Gbit/s

V23814-U1306-M136
V23815-U1306-M136
Pin Configuration
Pin Description Receiver (cont’d)
Pin Symbol Level/Logic Description
No.
54
V_EE
Ground
55 DO11P LVDS Out Data Output #11, non-inverted
56 DO11N LVDS Out Data Output #11, inverted
57
V_EE
Ground
58
V_EE
Ground
59 DO12P LVDS Out Data Output #12, non-inverted
60 DO12N LVDS Out Data Output #12, inverted
61
V_EE
62
V_EE
63
V_EE
64 t.b.l.o.
Ground
Ground
Ground
to be left open
65
V_EE
Ground
66
V_CCO
Power supply voltage of output stages
67 –SD12 LVCMOS Out Signal Detect on fiber #12.
low active Low = signal of sufficient AC power is present on
fiber #12.
High = signal on fiber #12 is insufficient.
68 ENSD LVCMOS In Enable Signal Detect.
High = SD1 and SD12 function enabled.
Low = SD1 and SD12 are set to permanent active.
This input has an internal pull-up which pulls to high
level when this input is left open.
69 t.b.l.o.
to be left open
70
V_CC
Power supply voltage of preamplifier and analog
circuitry
71
V_CC
Power supply voltage of preamplifier and analog
circuitry
72
V_EE
Ground
Data Sheet
9
2002-05-14