TLE4262 Datasheet, PDF (9/16 Pages) Siemens Semiconductor Group – 5-V Low Drop Voltage Regulator

TLE 4262
V_Ι
V_Q
V_D
t _rd
t _rr
V_RO
t
< t _rr
V _{Q, rt}
dV
dt
=
Ι _D,c
C_D
t
V _DU
V _DRL
t
Power-on-Reset
Thermal
Shutdown
Voltage Dip
at Input
Undervoltage Secondary Overload
Spike at Output
t
AED03010
Figure 5 Time Response
Reset Timing
The power-on reset delay time is defined by the charging time of an external capacitor
C_D which can be calculated as follows:
C_D = (∆t_rd × I_D,c)/∆V
(1)
Definitions:
• C_D = delay capacitor
• ∆t_rd = delay time
• I_D,c = charge current, typical 10 µA
• ∆V = V_DU, typical 1.8 V
• V_DU = upper delay switching threshold at C_D for reset delay time
Data Sheet
9
Rev. 2.8, 2008-05-19