TLD5098EL Datasheet, PDF (9/39 Pages) Infineon Technologies AG – DC/DC Boost, Buck-Boost, SEPIC controller

TLD5098EL
General Product Characteristics
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Pos. Parameter
Symbol
Limit Values
Unit Conditions
Min. Typ. Max.
4.3.1 Junction to Case^{1) 2)}
R_thJC
–
4.3.2 Junction to Ambient^{1) 3)}
R_thJA
–
4.3.3
R_thJA
–
4.3.4
R_thJA
–
1) Not subject to production test, specified by design.
10
–
47
–
54
–
64
–
K/W –
K/W 2s2p
K/W 1s0p + 600 mm²
K/W 1s0p + 300 mm²
2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed pad are fixed to
ambient temperature). Ta=25°C; The IC is dissipating 1W.
3) Specified R_thJA value is according to JEDEC 2s2p (JESD 51-7) + (JESD 51-5) and JEDEC 1s0p (JESD 51-3) + heatsink
area at natural convection on FR4 board; The device was simulated on a 76.2 x 114.3 x 1.5 mm board. The 2s2p board
has 2 outer copper layers (2 x 70µm Cu) and 2 inner copper layers (2 x 35µm Cu). A thermal via (diameter = 0.3 mm and
25 µm plating) array was applied under the exposed pad and connected the first outer layer (top) to the first inner layer and
second outer layer (bottom) of the JEDEC PCB. Ta=25°C; The IC is dissipating 1W.
Datasheet
9
Rev. 1.0, 2010-10-13