TLD5190QV Datasheet, PDF (8/58 Pages) Infineon Technologies AG – H-Bridge DC/DC Controller for High Power LED Lighting

3.2
Pin Definitions and Functions
H-Bridge DC/DC Controller
TLD5190QV
Pin Configuration
Pin
Symbol
Power Supply
1, 12, n.c.
15, 45,
48
44
VIN
47
IVCC_EXT
5, 8 PGND1, 2
26
VSS
40
AGND
-
EP
Gate Driver Stages
2
HSGD1
11
HSGD2
6
LSGD1
7
LSGD2
4
SWN1
9
SWN2
46
IVCC
Inputs and Outputs
I/O ¹⁾ Function
-
Not connected, tie to AGND on the Layout;
-
Power Supply Voltage;
Supply for internal biasing.
I PD External LDO input;
Input to alternatively supply internal Gate Drivers via an external LDO.
Connect to IVCC pin to use internal LDO to supply gate drivers. Must not
be left open.
-
Power Ground;
Ground for power potential. Connect externally close to the chip.
-
Digital GPIO Ground;
Ground for GPIO pins
-
Analog Ground;
Ground Reference
-
Exposed Pad;
Connect to external heatspreading Cu area (e.g. inner GND layer of
multilayer PCB with thermal vias).
O
Highside Gate Driver Output 1;
Drives the top n-channel MOSFET with a voltage equal to V_{IVCC_EXT}
superimposed on the switch node voltage SWN1. Connect to gate of
external switching MOSFET.
O
Highside Gate Driver Output 2;
Drives the top n-channel MOSFET with a voltage equal to V_{IVCC_EXT}
superimposed on the switch node voltage SWN2. Connect to gate of
external switching MOSFET.
O
Lowside Gate Driver Output 1;
Drives the lowside n-channel MOSFET between GND and V_{IVCC_EXT}
Connect to gate of external switching MOSFET.
O
Lowside Gate Driver Output 2;
Drives the lowside n-channel MOSFET between GND and V_{IVCC_EXT}
Connect to gate of external switching MOSFET.
IO
Switch Node 1;
SWN1 pin swings from a diode voltage drop below ground up to V_IN
IO
Switch Node 2;
SWN2 pin swings from ground up to a diode voltage drop above V_OUT
O
Internal LDO output;
Used for internal biasing and gate driver supply. Bypass with external
capacitor close to the pin. Pin must not be left open.
Data Sheet
8
Rev. 1.0, 2016-05-20