English
Language : 

ICE3BS02L Datasheet, PDF (8/21 Pages) Infineon Technologies AG – Off-Line SMPS Current Mode Controller with integrated 500V Startup Cell and Latched off Mode
F3
ICE3BS02L
Functional Description
Thus it is ensured that at every startup cycle the voltage ramp
at pin SoftS starts at zero.
The internal Voltage Reference is switched off if Latched
Off Mode or Auto Restart Mode is entered. The current
consumption is then reduced to 300µA.
Once the malfunction condition is removed, this block will
then turn back on. The recovery from Auto Restart Mode
does not require disconnecting the SMPS from the AC line.
In case Latched Off Mode is entered, VCC needs to be
lowered below 6V to reset the Latched Off Mode. This is
done usually by disconnecting the SMPS from the AC line.
When Active Burst Mode is entered the internal Bias is
switched off in order to reduce the current consumption
below 1.05mA while keeping the Voltage Reference still
active as this is necessary in this mode.
3.3
Startup Phase
place between 1V and 4V. Above VSoftsS = 4V there is no
longer duty cycle limitation DCmax which is controlled by
comparator C7 since comparator C2 blocks the gate G7 (see
Figure 4). This maximum charge current in the very first
stage when VSoftS is below 1V, is limited to 1.32mA.
VSoftS
5.4V
4V
max. Startup Phase
1V
max. Soft Start Phase
6.5V
3.25k
SoftS
RSoftS
T2
T3
1V
CSoftS
Soft Start
C7
Soft-Start
Comparator
&
G7
Gate Driver
C2
4V
0.85V
x3.7
CS
PWM OP
DCmax
t
DC1
DC2
t1
t2 t
Figure 5 Startup Phase
By means of this extra charge stage, there is no delay in the
beginning of the Startup Phase when there is still no
switching. Furthermore Soft Start is finished at 4V to have
faster the maximum power capability. The duty cycles DC1
and DC2 are depending on the mains and the primary
inductance of the transformer. The limitation of the primary
current by DC2 is related to VSoftS = 4V. But DC1 is related
to a maximum primary current which is limited by the
internal Current Limiting with CS = 1V. Therefore the
maximum Startup Phase is divided into a Soft Start Phase
until t1 and a phase from t1 until t2 where maximum power
is provided if demanded by the FB signal.
Figure 4
Soft Start
At the beginning of the Startup Phase, the IC provides a Soft
Start duration whereby it controls the maximum primary
current by means of a duty cycle limitation. A signal VSoftS
which is generated by the external capacitor CSofts in
combination with the internal pull up resistor RSoftS,
determines the duty cycle until VSoftS exceeds 4V.
When the Soft Start begins, CSoftS is immediately charged up
to approx. 1V by T2. Therefore the Soft Start Phase takes
Version 1.1
8
28 Sep 2005