TLE4242EJ_15 Datasheet, PDF (7/17 Pages) Infineon Technologies AG – 1 Channel High Side Current Source up to 500mA

Infineon® LITIX™ Linear
TLE4242EJ
General Product Characteristics
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2
Functional Range
Table 4-2 Functional Range
Parameter
Symbol
Input voltage range
Status output voltage
Status delay capacitance
PWM voltage
Reference resistor
Junction Temperature
V_I
V_ST
C_D
V_PWM
R_REF
T_j
Values
Unit Note or
Number
Min. Typ. Max.
Test Condition
4.5 –
42
V
–
P_4.1.1
–
–
16
V
–
P_4.1.3
0
–
2.2 µF –
P_4.1.4
0
–
40
V
–
P_4.1.6
0
–
1.8 Ω –
P_4.1.10
-40 –
150 °C –
P_4.1.12
Note: Within the functional or operating range, the IC operates as described in the circuit description. The
electrical characteristics are specified within the conditions given in the Electrical Characteristics table.
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Table 4-3 Thermal Resistance
Parameter
Symbol
Values
Unit Note or
Number
Min. Typ. Max.
Test Condition
Junction to Case¹⁾
R_thJC
–
8
10
K/W –
Junction to Ambient
R_thJA
–
39
–
K/W ²⁾ Ta = 85 °C
1) Not subject to production test, specified by design.
P_4.3.1
P_4.3.2
2) Specified R_thJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip + Package) was simulated on a 76.2 × 114.3 × 1.5 mm board with 2 inner copper layers (2 × 70 mm Cu, 2 × 35 mm
Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
Data Sheet
7
Revision 1.0
2015-03-13