HYS64V16200GDL Datasheet, PDF (7/16 Pages) Infineon Technologies AG – 144 pin SO-DIMM SDRAM Modules

HYS64V16200GDL/HYS64V32220GDL
144 pin SO-DIMM SDRAM Modules
Operating Currents per memory bank
(TA = 0 to 70 oC; V_SS = 0 V; V_DD = 3.3 V ± 0.3 V)
(Recommended Operating Conditions unless otherwise noted)
Parameter & Test Condition
Symb. -7/-7.5 -8
Note
OPERATING CURRENT
trc=trcmin.,
All banks operated in random access,
all banks operated in ping-pong manner
PRECHARGE STANDBY CURRENT in tck = min.
Power Down Mode
CS =VIH (min.), CKE<=Vil(max)
PRECHARGE STANDBY CURRENT in tck = min.
Non-Power Down Mode
CS = VIH (min.), CKE>=Vih(min)
NO OPERATING CURRENT
CKE>=VIH(min.)
ICC1
ICC2P
ICC2N
ICC3N
920 680 mA 1, 2
8
mA 1
160 120 mA 1
200 180 mA 1
tck = min., CS = VIH(min),
active state ( max. 4 banks)
CKE<=VIL(max.) ICC3P
40
mA 1
BURST OPERATING CURRENT
tck = min.,
Read command cycling
ICC4 600 400
mA 1,2
AUTO REFRESH CURRENT
tck = min.,
Auto Refresh command cycling
ICC5 960 880 mA 1
SELF REFRESH CURRENT
Self Refresh Mode, CKE=0.2V,
tck = infinity.
ICC6
7.2
mA 1
Notes:
1. These parameters depend on the cycle rate. These values are measured at 133 MHz for -7 & -7.5
and at 100 MHz for -8 modules. Input signals are changed once during tck.
2. These parameters are measured with continuous data stream during read access and all DQ toggling.
CL=3 and BL=4 is assumed and the data-out current is excluded.
INFINEON Technologies
7
9.01