XC164S Datasheet, PDF (60/72 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core

XC164S
Derivatives
Electrical Parameters
Sample time and conversion time of the XC164S’s A/D Converter are programmable. In
compatibility mode, the above timing can be calculated using Table 14.
The limit values for f_BC must not be exceeded when selecting ADCTC.
Table 14 A/D Converter Computation Table¹⁾
ADCON.15|14 A/D Converter
ADCON.13|12 Sample time
(ADCTC)
Basic Clock f_BC
(ADSTC)
t_S
00
f_SYS / 4
00
t_BC × 8
01
f_SYS / 2
01
t_BC × 16
10
f_SYS / 16
10
t_BC × 32
11
f_SYS / 8
11
t_BC × 64
1) These selections are available in compatibility mode. An improved mechanism to control the ADC input clock
can be selected.
Converter Timing Example:
Assumptions:
f_SYS
Basic clock
f_BC
Sample time
t_S
Conversion 10-bit:
= 40 MHz (i.e. t_SYS = 25 ns), ADCTC = ‘01’, ADSTC = ‘00’.
= f_SYS / 2 = 20 MHz, i.e. t_BC = 50 ns.
= t_BC × 8 = 400 ns.
With post-calibr.
Post-calibr. off
Conversion 8-bit:
t_C10P
t_C10
= 52 × t_BC + t_S + 6 × t_SYS = (2600 + 400 + 150) ns = 3.15 µs.
= 40 × t_BC + t_S + 6 × t_SYS = (2000 + 400 + 150) ns = 2.55 µs.
With post-calibr. t_C8P = 44 × t_BC + t_S + 6 × t_SYS = (2200 + 400 + 150) ns = 2.75 µs.
Post-calibr. off t_C8 = 32 × t_BC + t_S + 6 × t_SYS = (1600 + 400 + 150) ns = 2.15 µs.
Data Sheet
56
V1.0, 2005-01