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XC164S Datasheet, PDF (6/72 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core | |||
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XC164S
Derivatives
Summary of Features
1
Summary of Features
⢠High Performance 16-bit CPU with 5-Stage Pipeline
â 25 ns Instruction Cycle Time at 40 MHz CPU Clock (Single-Cycle Execution)
â 1-Cycle Multiplication (16 Ã 16 bit), Background Division (32 / 16 bit) in 21 Cycles
â 1-Cycle Multiply-and-Accumulate (MAC) Instructions
â Enhanced Boolean Bit Manipulation Facilities
â Zero-Cycle Jump Execution
â Additional Instructions to Support HLL and Operating Systems
â Register-Based Design with Multiple Variable Register Banks
â Fast Context Switching Support with Two Additional Local Register Banks
â 16 Mbytes Total Linear Address Space for Code and Data
â 1024 Bytes On-Chip Special Function Register Area (C166 Family Compatible)
⢠16-Priority-Level Interrupt System with up to 67 Sources, Sample-Rate down to 50 ns
⢠8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
Peripheral Event Controller (PEC), 24-Bit Pointers Cover Total Address Space
⢠Clock Generation via on-chip PLL (factors 1:0.15 ⦠1:10), or
via Prescaler (factors 1:1 ⦠60:1)
⢠On-Chip Memory Modules
â 2 Kbytes On-Chip Dual-Port RAM (DPRAM)
â 2 Kbytes On-Chip Data SRAM (DSRAM)
â 2 Kbytes On-Chip Program/Data SRAM (PSRAM)
â up to 128 Kbytes On-Chip Program Memory (Flash Memory)
⢠On-Chip Peripheral Modules
â 14-Channel A/D Converter with Programmable Resolution (10-bit or 8-bit) and
Conversion Time (down to 2.55 µs or 2.15 µs)
â Two 16-Channel General Purpose Capture/Compare Units (12 Input/Output Pins)
â Capture/Compare Unit for flexible PWM Signal Generation (CAPCOM6)
(3/6 Capture/Compare Channels and 1 Compare Channel)
â Multi-Functional General Purpose Timer Unit with 5 Timers
â Two Synchronous/Asynchronous Serial Channels (USARTs)
â Two High-Speed-Synchronous Serial Channels
â On-Chip Real Time Clock
⢠Idle, Sleep, and Power Down Modes with Flexible Power Management
⢠Programmable Watchdog Timer and Oscillator Watchdog
⢠Up to 12 Mbytes External Address Space for Code and Data
â Programmable External Bus Characteristics for Different Address Ranges
â Multiplexed or Demultiplexed External Address/Data Buses
â Selectable Address Bus Width
â 16-Bit or 8-Bit Data Bus Width
â Four Programmable Chip-Select Signals
⢠Up to 79 General Purpose I/O Lines,
partly with Selectable Input Thresholds and Hysteresis
Data Sheet
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V1.0, 2005-01
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