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TLE7230R Datasheet, PDF (6/16 Pages) Infineon Technologies AG – Smart Octal Low-Side Switch
Target Datasheet TLE7230 R/G
Electrical Characteristics cont.
Parameter and Conditions
VS = 4.5 to 5.5 V ; Tj = - 40 °C to + 150 °C ; Reset = H
(unless otherwise specified)
Symbol Values
min typ
Unit
max
5. Diagnostic Functions
Open Load Detection Voltage
Output Pull Down Current
Fault Delay Time
Overload switch off delay time
Short to Ground Detection Voltage
Short to Ground Detection Current
Overload Threshold Current
Overtemperature Shutdown Threshold2
Hysteresis2
VDS(OL)
IPD(OL)
td(fault)
Td(off)
VDS(SHG)
ISHG
ID(lim) 1...8
Tth(sd)
Thys
6. SPI-Timing (for VVDO = 4.5V to 5.5V)
Serial Clock Frequency (depending on SO load)
fSCK
Serial Clock Period (1/fclk)
tp(SCK)
Serial Clock High Time
tSCKH
Serial Clock Low Time
tSCKL
Enable Lead Time (falling edge of CS to rising edge of CLK) tlead
VS -2
90
100
10
50
VS -2.9
-100
1
2
175 --
200
--
10
--
DC --
5
200 --
--
50 --
--
50 --
--
250 --
--
V
µA
µs
µs
V
µA
A
°C
K
MHz
ns
ns
ns
ns
Enable Lag Time (falling edge of CLK to rising edge ofCS) tlag
Data Setup Time (required time SI to falling of CLK)
tSU
Data Hold Time (falling edge of CLK to SI)
tH
Disable Time @ CL = 50 pF2
tDIS
Transfer Delay Time3
tdt
(CS high time between two accesses)
Data Valid Time
CL = 50 pF2 tvalid
CL = 100 pF2
CL = 220 pF2
250 ---
20 --
20 --
--
--
tbd --
--
ns
--
ns
--
ns
150 ns
--
ns
--
tbd
ns
--
tbd
--
tbd
2 This parameter is not subject to production test
3 This time is necessary between two write accesses. To get the correct diagnostic information, the transfer delay
time has to be extended to the maximum fault delay time td(fault)max = 200µs.
V1.1
Page 6
12. Oct. 2003