TLE42754_14 Datasheet, PDF (6/29 Pages) Infineon Technologies AG – Very low Current Consumption

TLE42754
Pin Configuration
3.3
Pin Assignment TLE42754E (PG-SSOP-14 exposed pad)
n.c.
1
RO
2
n.c.
3
GND
4
n.c.
5
D
6
n.c.
7
14
13
12
11
10
9
8
PINCONFIG_SSOP-14.SVG
n.c.
I
n.c.
n.c.
n.c.
Q
n.c.
Figure 3 Pin Configuration (top view)
3.4
Pin Definitions and Functions TLE42754E (PG-SSOP-14 exposed pad)
Pin
1,3,5,7
2
Symbol
n.c.
RO
4
GND
6
D
8,10,11,12, n.c.
14
9
Q
13
I
Pad
–
Function
not connected
leave open or connect to GND
Reset Output
open collector output; external pull-up resistor to a positive potential required;
leave open if the reset function is not needed
Ground
Reset Delay Timing
connect a ceramic capacitor to GND for adjusting the reset delay time;
leave open if the reset function is not needed
not connected
leave open or connect to GND
Output
block to GND with a capacitor close to the IC terminals, respecting the values given
for its capacitance C_Q and ESR in the table “Functional Range” on Page 8
Input
for compensating line influences, a capacitor to GND close to the IC terminals is
recommended
Exposed Pad
connect to heatsink area;
connect with GND on PCB
Data Sheet
6
Rev. 1.2, 2014-07-03