TLE4299_04 Datasheet, PDF (5/22 Pages) Infineon Technologies AG – 5-V Low Drop Fixed Voltage Regulator

TLE 4299
P-DSO-8-3
I
1
SI
2
RADJ
3
D
4
8
Q
7
SO
6
RO
5
GND
AEP02832
Figure 3 Pin Configuration (top view)
Table 1
Pin No.
1
2
3
4
5
6
7
8
Pin Definitions and Functions (TLE 4299 G)
Symbol Function
I
Input; block directly to GND on the IC with a ceramic capacitor.
SI
Sense Input; if not needed connect to Q.
RADJ Reset Threshold; if not needed connect to GND.
D
Reset Delay; to select delay time, connect to GND via external
capacitor.
GND
Ground
RO
Reset Output; the open-collector output is internally linked to Q
via a 20 kΩ pull-up resistor. Keep open, if the pin is not needed.
SO
Sense Output; the open-collector output is internally linked to
the output via a 20 kΩ pull-up resistor. Keep open, if the pin is not
needed.
Q
5-V Output; connect to GND with a 22 µF capacitor, ESR < 5 Ω.
Data Sheet
5
Rev. 1.1, 2004-01-01