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C161CS-32R Datasheet, PDF (48/89 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller
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C161CS/JC/JI-32R
C161CS/JC/JI-L
Table 7
Name
IDPROG
IFR
INTCON
IPCR
ISNC
MDC
MDH
MDL
ODP2
ODP3
ODP4
ODP6
ODP7
ONES
P0H
P0L
P1H
P1L
P2
P3
P4
P5
P6
P7
P9
PECC0
PECC1
PECC2
PECC3
PECC4
PECC5
PECC6
C161CS/JC/JI Registers, Ordered by Name (cont’d)
Physical 8-Bit Description
Address Addr.
F078H E 3CH
EB18H X ---
EB2CH X ---
EB04H X ---
F1DEH E EFH
b FF0EH
87H
FE0CH
06H
FE0EH
07H
b F1C2H E E1H
b F1C6H E E3H
b F1CAH E E5H
b F1CEH E E7H
b F1D2H E E9H
b FF1EH
8FH
b FF02H
81H
b FF00H
80H
b FF06H
83H
b FF04H
82H
b FFC0H
E0H
b FFC4H
E2H
b FFC8H
E4H
b FFA2H
D1H
b FFCCH E6H
b FFD0H
E8H
b FFD8H
ECH
FEC0H
60H
FEC2H
61H
FEC4H
62H
FEC6H
63H
FEC8H
64H
FECAH 65H
FECCH 66H
Identifier
SDLM In-Frame Response Register
SDLM Interrupt Control Register
SDLM Interface Port Connect Register
Interrupt Subnode Control Register
CPU Multiply Divide Control Register
CPU Multiply Divide Reg. – High Word
CPU Multiply Divide Reg. – Low Word
Port 2 Open Drain Control Register
Port 3 Open Drain Control Register
Port 4 Open Drain Control Register
Port 6 Open Drain Control Register
Port 7 Open Drain Control Register
Constant Value 1’s Register (read only)
Port 0 High Reg. (Upper half of PORT0)
Port 0 Low Reg. (Lower half of PORT0)
Port 1 High Reg. (Upper half of PORT1)
Port 1 Low Reg. (Lower half of PORT1)
Port 2 Register
Port 3 Register
Port 4 Register (7 bits)
Port 5 Register (read only)
Port 6 Register (8 bits)
Port 7 Register (8 bits)
Port 9 Register (8 bits)
PEC Channel 0 Control Register
PEC Channel 1 Control Register
PEC Channel 2 Control Register
PEC Channel 3 Control Register
PEC Channel 4 Control Register
PEC Channel 5 Control Register
PEC Channel 6 Control Register
Reset
Value
XXXXH
0000H
0000H
0007H
0000H
0000H
0000H
0000H
0000H
0000H
00H
00H
00H
FFFFH
00H
00H
00H
00H
0000H
0000H
00H
XXXXH
00H
00H
00H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
Data Sheet
44
V3.0, 2001-01
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