SLE88CX720P Datasheet, PDF (3/8 Pages) Infineon Technologies AG – Security & Chip Card ICs

SLE 88CX720P
32-Bit Multi Application Security Controller with powerful Memory Management and
Protection Unit in 0.22µm CMOS Technology
240 Kbytes ROM, 8 Kbytes RAM, 80 Kbytes EEPROM and
1100-Bit Advanced Crypto Engine
Features
• Dedicated smart card core: pipelined
32-Bit RISC micro-controller in 0.22 µm
CMOS technology with integrated
security concept
• Designed for maximum security and
maximum performance at ultra low
power consumption
• Internal clock generation
Adjustment of internal clock according to
available power and required
performance:
• Increase internal clock for maximum
speed (55 MHz)
• Reduce internal clock for lowest
power consumption (e.g. contactless
conditions)
• Instruction set acceleration of Virtual
Machine languages (e.g. Java Card^TM,
MULTOS^TM, ...)
• 4 Gbytes address range controlled by a
powerful Memory Management and
Protection Unit (MMU)
• Package Concept: application
oriented memory partitioning
• Secure hardware controlled execution
of applications and application data
access
• Controlled access to peripherals
• Hardware ECC for ROM, RAM and
EEPROM
• Efficient Task switch capability
• 240 Kbytes of ROM for application
programs, libraries, and device drivers
• 80 Kbytes of EEPROM as program and
data memory
• 8 Kbytes of RAM for local variables,
buffers, and stacks
• High performance Cache Memories
for instruction fetch and data access
EEPROM
• Self timed programming
• 500,000 write/erase cycles
• Data retention: min. 10 years @ 25°C
• EEPROM programming voltage
generated on chip
• Erase/Programming cycle time 4.5 ms
• Page mode for programmi ng up to 64
bytes at one shot
Integrated Security Concept
• Hardware Memory Management and
Protection Unit
• Enhanced on-chip encryption of internal
data
• Low and high voltage sensors
• High and low frequency sensors
• Spike filter for CLK
• Reset filter
• Temperature sensor
• Glitch Sensor
• Light Sensor
• Unique chip identification number for
each chip
• Security optimized layout
• Hardware encryption of memories
Preliminary Short Product Information
3/8
06.03