SLE66CX640P Datasheet, PDF (3/9 Pages) Infineon Technologies AG – Security & Chip Card ICs

SLE 66CX640P
16-Bit Security Controller with MMU in 0.25µm CMOS Technology
136-Kbyte ROM, 5052 bytes RAM, 64-Kbyte EEPROM
1100-Bit Advanced Crypto Engine and
112-Bit/ 192-Bit DDES Accelerator
Features
• 16-bit microcomputer in 0.25 µm CMOS
technology
• Instruction set opcode compatible with
standard SAB 8051 processor
• Enhanced 16-bit arithmetic
• Additional powerful instructions optimized
for chip card applications
• Dedicated, non-standard architecture with
execution time 6 times faster (18 times
by PLLmax) than standard SAB 8051
processor at same external clock
• 135 Kbytes User ROM for application
programs
• Additional 1 Kbytes reserved ROM for
Resource Management System (RMS+)
with intelligent EEPROM write/erase
routines
• 64 Kbytes EEPROM
• 4 Kbytes XRAM, 256 (+700) bytes internal
RAM
• Memory Management and Protection
Unit (MMU)
• Dual Key Triple DES (DDES) and EC2
GF (2ⁿ) Accelerator
• Advanced Crypto Engine for up to 2048
bit RSA computation
• CRC Module
• Interrupt Module
• PLL
• Two 16-bit Autoreload Timer
• Power saving sleep mode
• Ext. Clock freq. 1 to 7.5 MHz for int.
Clock ≤ 10 MHz
• UART for handling serial interface in
accordance with ISO/IEC 7816 part 3
supporting transmission protocols T=1
and T=0
• I/O routines realized in software executable
• Supply voltage range: 2.7 V to 5.5 V
• ESD protection larger than 6 kV
EEPROM
• Reading, erasing and writing byte by byte
• Flexible page mode for 1 to 64 bytes
write/erase operation
• 32 bytes security area (OTP)
• Erase + Write time < 4.5 ms
• Minimum of 500.000 write/erase cycles at
25°C
• Data retention for a minimum of 10 years
• EEPROM programming voltage generated on
chip
Memory Management and Protection Unit
• Addressable memory up to 1 MByte
• Separates OS (system) and application
(user)
• System routines called by traps
• OS can restrict access to peripherals in
application mode
• Code execution from XRAM possible
Security Features
Operation state monitoring mechanism
• Low and high voltage sensors
• Frequency sensors and filters
Memory Security
• 16 bytes security PROM, hardware
protected
• Unique chip identification number for each
chip
• MED – memory encryption/decryption
device for XRAM, ROM and EEPROM
• True Random Number Generator with
Firmware test function
• Security optimised layout and layout
scrambling
Short Product Information
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08.01