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TDA6170 Datasheet, PDF (23/27 Pages) Infineon Technologies AG – Components for Entertainment Electronics, Satellite Sound IF
Data Sheet
TDA6170X
Parameter
Symbol
total harmonic distortion
THD
signal to noise ratio
S/N
Mute attenuation
I2C-Bus Interface
aMUTE
LOW level input voltage for both
SDA and SCL
VIL
HIGH level input voltage for both
SDA and SCL
VIH
Hysteresis of Schmitt trigger
inputs
Vhys
Pulse width of spikes which must
be suppressed by the input filters
tSP
LOW level output voltage (open VOL1
collector)
VOL2
Output fall time from
VIHmin to VILmax with a bus
tOF
capacitance from 10 pF to 400 pF
Input current for both SDA + SCL Ii
SCL clock frequency
fSCL
Bus free time between a STOP
and START condition
tBUF
Hold time (repeated) START con-
dition. After this period, the first tHD,STA
clock pulse is generated
LOW period of the SCL clock
HIGH period of the SCL clock
Set-up time for repeated START
condition
tLOW
tHIGH
tSU,DAT
Data hold time:
for I2C-bus devices
tHD,DAT
Data set-up time
tSU,DAT
Rise time of both SDA + SCL
tR
Limit Values
Unit
min
typ
max
0.2
0.5 %
0.2
0.5 %
70
75
dB
75
90
dB
-0.5
3
0.2
0
0
20 +
0.1Cb
-10
0
1.3
0.6
1.3
0.6
0.6
0
100
20 +
0.1Cb
1.5 V
VVD +
0.5
V
V
50 ns
0.4
0.6
V
250 ns
10 µA
400 kHz
µs
µs
µs
µs
µs
0.9 µs
ns
300 ns
Test conditions
VMIXIN > 2 mV
∆f = 27kHz,
fmod = 1kHz,
Control Byte = 000
VMIXIN > 2 mV
∆f = 50kHz,
fmod = 1kHz,
Control Byte = 011
A-weighted,
∆f = 27kHz,
fmod = 1kHz,
Control Byte = 000
Control Byte = 111
3 mA sink current
6 mA sink current
Semiconductor Group
19
21.7.99