TLE8108EM Datasheet, PDF (22/30 Pages) Infineon Technologies AG – Smart 8-Channel Low Side Relay Driver with SPI Interface

TLE 8108 EM
Smart 8-Channel Low Side Switch
Serial Peripheral Interface (SPI)
SI
TER
OR
1
SO
0
SO
SI SPI
S
Figure 11
CS
SCLK
S
Transmission Error Flag on SO Line
Transmission Error.vsd
CS Low to High transition:
Data from shift register is transferred into the input matrix register only if a multiple of 8 SCLK signals after the
falling edge of CS has been detected, while the minimum valid length of 16 clocks for the 16-bit register
TLE8108EM is taken into account.
SCLK - Serial Clock:
This input pin clocks the internal shift register. The serial input (SI) transfers data into the shift register on the falling
edge of SCLK while the serial output (SO) shifts diagnostic information out on the rising edge of the serial clock.
It is essential that the SCLK pin is in low state whenever chip select CS makes any transition.
SI - Serial Input:
Serial input data bits are shifted in at this pin, the most significant bit first. SI information is read on the falling edge
of SCLK. Please refer to Section 8.3 for further information.
SO - Serial Output:
Data is shifted out serially at this pin, the most significant bit first. SO is in high impedance state until the CS pin
goes to low state. New data will appear at the SO pin following the rising edge of SCLK. Please refer to Section 8.3
for further information.
Data Sheet
22
Rev. 1.0, 2011-03-23