TLE9262QXV33 Datasheet, PDF (21/164 Pages) Infineon Technologies AG – Dedicated Data Sheets are available for the different product variants

TLE9262QXV33
5.1
Block Description of State Machine
System Features
The different SBC Modes are selected via SPI by setting the respective SBC MODE bits in the register
M_S_CTRL. The SBC MODE bits are cleared when going through SBC Restart Mode and thus always show the
current SBC mode.
First battery connection
SBC Soft Reset
Config.: settings can be
changed in this SBC mode ;
Fixed: settings stay as defined
in SBC Normal Mode
* The SBC Development Mode
is a super set of state machine
where the WD timer is stopped
and CAN /LINx behavior differs
in SBC Init Mode . Otherwise,
there are no differences in
behavior .
VCC1
ON
FOx
inact.
SBC Init Mode *
(Long open window)
VCC2
OFF
CAN⁽³⁾
OFF
VCC3
OFF
LINx⁽³⁾
OFF
WD Cyc. Sense
Config. OFF
HSx Cyc.Wake
OFF OFF
Any SPI
command
SBC Normal Mode
VCC1
ON
FOx
act/inact
VCC2
config.
CAN⁽³⁾
config.
VCC3
config.
LINx⁽³⁾
config.
WD Cyc. Sense
config. config.
HSx Cyc.Wake
config. config.
Automatic
Reset is released
WD starts with long open window
SPI cmd
SPI cmd
SPI cmd
WD trigger
VCC1 over voltage
Config 1/3 (if VCC_OV_RST set)
SBC Sleep Mode
VCC1
OFF
FOx
fixed
VCC2
fixed
VCC3⁽²⁾
Fixed /
OFF
CAN LINx
Wake
Wake
capable /off capable /off
WD Cyc. Sense
OFF. fixed
HSx Cyc.Wake
fixed OFF
VCC1
ON
FOx
fixed
SBC Stop Mode
VCC2
fixed
CAN
fixed
VCC3
fixed
LINx
fixed
WD Cyc. Sense
fixed fixed
HSx Cyc.Wake
fixed fixed
Watchdog Failure:
Config 1/3 & 1st WD failure
in Config4
VCC1
Undervoltage
SBC Restart Mode
(RO pin is asserted)
VCC1
ON/
ramping
FOx⁽⁵⁾
active/
fixed
VCC2
OFF
CAN ⁽⁴⁾
woken /
OFF
VCC3⁽²⁾
fixed/
ramping
LINx ⁽⁴⁾
woken /
OFF
WD Cyc. Sense
OFF OFF
HSx Cyc.Wake
OFF OFF
Wake up event
VCC1 over voltage
Config 2/4 (if VCC_OV_RST set)
After 4x consecutive VCC 1
under voltage events
(if VS > VS_UV)
SBC Fail-Safe Mode ⁽¹⁾
(1) After Fail-Safe Mode entry, the device will stay for at least typ . 1s
in this mode (with RO low) after a TSD2 event and min. typ. 100ms
after other Fail-Safe Events. Only then the device can leave the
mode via a wake-up event. Wake events are stored during this time.
(2) according to VCC3 configuration
(3) For SBC Development Mode CAN/LINx/VCC2 are ON in SBC Init
Mode and stay ON when going from there to SBC Normal Mode
(4) See chapter CAN & LIN for detailed behavior in SBC Restart Mode
(5) See Chapter5.1.5 and 14.1 for detailed FOx behavior
CAN, LINx, WKx wake-up event
OR
Release of over temperature
TSD2 after tTSD2
VCC1
OFF
FOx⁽⁵⁾
active
VCC2
OFF
CAN
Wake
capable
VCC3
OFF
LINx
Wake
capable
WD Cyc. Sense
OFF OFF
HSx Cyc.Wake
OFF OFF
TSD2 event,
1st Watchdog Failure Config 2,
2nd Watchdog Failure, Config 4
VCC1 Short to GND
Figure 3 State Diagram showing the SBC Operating Modes
Data Sheet
21
Rev. 1.1, 2014-10-23