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| TLE9262QXV33 Datasheet, PDF (127/164 Pages) Infineon Technologies AG – Dedicated Data Sheets are available for the different product variants | |||
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TLE9262QXV33
Serial Peripheral Interface
BUS_CTRL_1
Bus Control (Address 000 0100B)
POR / Soft Reset Value: 0010 0000B;
Restart Value: xxxy y0yyB
7
6
5
4
3
2
1
LIN_FLASH
rw
LIN_LSM LIN_TXD_TO
rw
rw
LIN1_1
rwh
LIN1_0
rwh
Reserved
CAN_1
r
r
rwh
0
CAN_0
rwh
Field
Bits
LIN_FLASH 7
LIN_LSM 6
LIN_TXD_ 5
TO
LIN1
4:3
Reserved 2
CAN
1:0
Type
rw
rw
rw
rwh
r
rwh
Description
LINx Flash Programming Mode
0B , Slope control mechanism active
1B , Deactivation of slope control for baud rates up to 115kBaud
LINx Low-Slope Mode Selection
0B , LIN Normal-Mode is activated
1B , LIN Low-Slope Mode (10.4kBaud) activated
LINx TXD Time-Out Control
0B , TXD Time-Out feature disabled
1B , TXD Time-Out feature enabled
LIN1-Module Mode
00B , LIN1 OFF
01B , LIN1 is wake capable
10B , LIN1 Receive Only Mode
11B , LIN1 Normal Mode
Reserved, always reads as 0
HS-CAN Module Modes
00B , CAN OFF
01B , CAN is wake capable
10B , CAN Receive Only Mode
11B , CAN Normal Mode
Notes
1. Changes in the bits LIN_FLASH, LIN_LSM, and LIN_TXD_ TO will be effective immediately once CSN goes
to â1â and applies for both LIN transceivers.â
2. The reset values for the LINx and CAN transceivers are marked with âyâ because they will vary depending on
the cause of change - see below.
3. see Figure 26 and Figure 33 for detailed state changes of LIN and CAN Transceiver for different SBC modes.
4. Failure Handling Mechanism: When the device enters Fail-Safe Mode due to a failure (TSD2, WD-Failure,...),
then the wake registers BUS_CTRL_1 and WK_CTRL_2 are reset to following values (=wake sources) âxxx0
1001â and âx0x0 0111â in order to ensure that the device can be woken again.
Data Sheet
127
Rev. 1.1, 2014-10-23
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