TLE7257 Datasheet, PDF (21/31 Pages) Infineon Technologies AG – LIN Transceiver

TLE7257
Electrical Characteristics
Table 6 Electrical Characteristics (cont’d)
5.5 V < V_S < 18 V; R_L = 500 Ω; -40°C < T_j < 150°C;
all voltages with respect to ground; positive current flowing into pin; unless otherwise specified.
Parameter
Symbol
Values
Unit Note / Test Condition
Min. Typ. Max.
Num
ber
Bus dominant output voltage V_BUS,do
V_TxD = 0 V; R_L = 500 Ω;
maximum load
–
–
1.4 V V_S = 7 V;
–
–
2.0 V V_S = 18 V;
Dynamic Transceiver Characteristics
4.8.9
Propagation delay:
LIN bus dominant to RxD “low” t_{rx_pdft}
LIN bus recessive to RxD “high” t_{rx_pdr}
Receiver delay symmetry
t_{rx_sym}
Dominant time for bus wake-up t_WK,bus
Delay time for mode change t_MODE
TxD time-out
t_TxD
TxD recessive time to release t_to,rec
transmitter
Duty cycle D1
D1
(for worst case at 20 kBit/s)
Duty cycle D1
D1
for V_S supply 5.5 V to 7.0 V
(for worst case at 20 kBit/s)
Duty cycle D2
D2
(for worst case at 20 kBit/s)
Duty cycle D2
D2
for V_S supply 6.1 V to 7.6 V
(for worst case at 20 kBit/s)
LIN Spec 2.2A (Par. 31)
4.9.1
1
3.5 6
μs R_RxD = 2.4 kΩ; C_RxD = 20 pF
1
3.5 6
μs
-2 –
30 –
2
μs LIN Spec 2.2A (Par. 32)
4.9.2
t_{rx_sym} = t_{rx_pdf} - t_{rx_pdr};
R_RxD = 2.4 kΩ; C_RxD = 20 pF
150 μs –
4.9.3
–
–
50
μs ⁴⁾
4.9.4
8
18 28 ms –
4.9.5
–
–
10
μs ¹⁾
4.9.6
0.396 –
–
0.396 –
–
–
–
0.581
–
–
0.581
Duty cycle 1 ⁵⁾
TH_Rec(max) = 0.744 × V_S;
TH_Dom(max) =0.581 × V_S;
V_S = 7.0 … 18 V; t_bit = 50 μs;
D1 = t_{bus_rec(min)} / 2 × t_bit;
LIN Spec 2.2A (Par. 27)
4.9.7
Duty cycle 1 ⁵⁾
TH_Rec(max) = 0.760 × V_S;
TH_Dom(max) = 0.593 × V_S;
5.5 V < V_S < 7.0 V;
t_bit = 50 μs;
D1 = t_{bus_rec(min)} / 2 × t_bit
Duty cycle 2 ⁵⁾
4.9.8
4.9.9
TH_Rec(min)= 0.422 × V_S;
TH_Dom(min)= 0.284 × V_S;
V_S = 7.6 … 18 V; t_bit = 50 μs;
D2 = t_{bus_rec(max)} / 2 × t_bit;
LIN Spec 2.2A (Par. 28)
Duty cycle 2 ⁵⁾
TH_Rec(min)= 0.410 × V_S;
TH_Dom(min)= 0.275 × V_S;
6.1 V < V_S < 7.6 V;
t_bit = 50 μs;
D2 = t_{bus_rec(max)} / 2 × t_bit
4.9.10
Data Sheet
21
Rev. 1.0, 2013-10-16