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TLE4678_15 Datasheet, PDF (18/37 Pages) Infineon Technologies AG – Low Drop Out Linear Voltage Regulator
TLE4678
Reset Function
7
Reset Function
7.1
Description Reset Function
The reset function provides several features:
Output Undervoltage Reset
An output undervoltage condition is indicated by setting the Reset Output “RO” to “low”. This signal might be
used to reset a microcontroller during low supply voltage.
Power-On Reset Delay Time
The power-on reset delay time td,PWR-ON allows a microcontroller and oscillator to start up. This delay time is
the time period from exceeding the upper reset switching threshold VRT,hi until the reset is released by
switching the reset output “RO” from “low” to “high”. The power-on reset delay time td,PWR-ON is defined by an
external delay capacitor CD connected to pin “D” which is charged up by the delay capacitor charge
current ID,ch starting from VD = 0 V.
In case a power-on reset delay time td,PWR-ON different from the value for CD = 100nF is required, the delay
capacitor’s value can be derived from the specified value given in Item 7.2.15:
CD = 100nF × td,PWR-ON / td,PWR-ON,100nF
(7.1)
with
• td,PWR-ON: Desired power-on reset delay time
• td,PWR-ON,100nF: Power-on reset delay time specified in Item 7.2.15
• CD: Delay capacitor required.
The formula is valid for CD ≥ 10nF. For precise timing calculations consider also the delay capacitor’s
tolerance.
Undervoltage Reset Delay Time
Unlike the power-on reset delay time, the undervoltage reset delay time td considers a short output
undervoltage event where the delay capacitor CD is assumed to be discharged to VD = VDST,lo only before the
charging sequence starts. Therefore, the undervoltage reset delay time td is defined by the delay capacitor
charge current ID,ch starting from VD = VDST,lo and the external delay capacitor CD.
A delay capacitor CD for a different undervoltage reset delay time as specified in Item 7.2.14 can be calculated
similar as above:
CD = 100nF × td / td,100nF
(7.2)
with
• td: Desired undervoltage reset delay time
• td,100nF: Power-on reset delay time specified in Item 7.2.14
• CD: Delay capacitor required
The formula is valid for CD ≥ 10nF. For precise timing calculations consider also the delay capacitor’s
tolerance.
Datasheet
18
Rev. 1.2, 2014-10-17