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BTM7752G Datasheet, PDF (17/25 Pages) Infineon Technologies AG – High Current H-Bridge Trilith IC 3G
High Current H-Bridge
BTM7752G
Block Description and Characteristics
6.4
Control and Diagnostics
6.4.1 Input Circuit
The control inputs INx and INH consist of TTL/CMOS compatible schmitt triggers with hysteresis which control the
integrated gate drivers for the MOSFETs. To set the device in stand-by mode, INH and INx pins need to be all
connected to GND. When the INH is high, in each half bridge one of the two power switches (HSx or LSx) is
switched on, while the other power switch is switched off, depending on the status of the INx pin. When INH is low,
a high INx signal will turn the corresponding highside switches on. This provides customer the possibility to switch
on one high side switch while keeping the other switches off and therefore to do an open load detection together
with external circuitry (see also Chapter 7 - Application Information). A low on all INx and INH signal will turn off
both power switches. To drive the logic inputs no external driver is needed, therefore the BTM7752G can be
interfaced directly to a microcontroller.
6.4.2 Dead Time Generation
In bridge applications it has to be assured that the highside and lowside MOSFET are not conducting at the same
time, connecting directly the battery voltage to GND. This is assured by a circuit in the driver IC, which senses the
status of the MOSFETs to ensure that the high or low side switch can be switched on only if the corresponding
low or high side switch is completely turned off.
6.4.3 Status Flag Diagnosis with Current Sense Capability
The status pin IS is used as a combined current sense and error flag output. In normal operation (current sense
mode), a current source is connected to the status pin, which delivers a current proportional to the forward load
current flowing through the active high side switch. If the high side switch is inactive or the current is flowing in the
reverse direction no current will be driven except for a marginal leakage current IIS(LK). If both high side switches
are in on state, the IS provides the sense current of the high side switch, which has been turned on first. To reset
this assignment both inputs IN1 and IN2 has to be set to low and both high side switches has to be off.
The external resistor RIS determines the voltage per output current. E.g. with the nominal value of 3.1k for the
current sense ratio kILIS = IL / IIS, a resistor value of RIS = 1kΩ leads to VIS = (IL / 3.1A)V. In case of a fault condition
the status output is connected to a current source which is independent of the load current and provides IIS(lim).
The maximum voltage at the IS pin is determined by the choice of the external resistor and the supply voltage. In
case of current limitation the IIS(lim) is activated for 1.5 * tCLS.
Normal operation:
current sense mode
VS
IIS~ ILoad
IIS(lim)
ESD-ZD
IS
Sense
output
logic
RIS VIS
Fault condition:
error flag mode
VS
ESD-ZD
IS
IIS(lim)
Sense
output
logic
RIS VIS
Figure 13 Sense current and fault current
Data Sheet
17
Rev. 2.0, 2010-05-28