TLE6208-3-G Datasheet, PDF (16/21 Pages) Infineon Technologies AG – Triple-Half-Bridge

TLE 6208-3 G
3
Timing Diagrams
CSN High to Low & rising edge of CLK: DO is enabled. Status information is transferred to Output Shift Register
CSN
time
CSN Low to High: Data from Shift-Register is transferred to Output Power Switches
CLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
01
time
Actual Data
New Data
DI
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
01
++
time
DI: Data will be accepted on the falling edge of CLK-Signal
Previous Status
Actual Status
DO
0- 1- 2- 3- 4- 5- 6- 7- 8- 9- 1-0 1-1 1-2 1-3 1-4 1-5
01
time
DO: State will change on the rising edge of CLK-Signal
e.g.
HS1
Old Data
Actual Data
time
AET02177
Figure 3 Data Transfer Timing
Data Sheet
16
2001-05-10