PEB3265FV1.5 Datasheet, PDF (142/374 Pages) Infineon Technologies AG – Dual Channel Subscriber Line Interface Concept

DuSLIC
SLICOFI-2x Command Structure and Programming
CMD[2:0] = 1 1 0 POP command (Signal Processing Operation
Programming).
CMD[2:0] = 1 1 1 Reserved for production tests
Structure of the Second Command Byte
The second command byte specifies a particular SOP, COP, or POP command,
depending on the CMD[2:0] bits of the first command byte. In the following sections, the
contents of this register are described for each command group.
The second command byte specifies the initial offset for the subsequent data bytes. After
each data byte is transferred, the internal offset is incremented automatically. Therefore,
it is possible to send a varied number of data bytes with one SOP, COP, or POP
command. Writing over read-only registers will not destroy their contents.
Register Description Example
At the beginning of each register description, a single line gives information about:
• Offset: Offset of register address (hex)
• Name: Short name of the register
• Detailed Name: Detailed name of the register
• Reset Value: Value of the register after reset (hex)
“hw” – value depends on specific hardware fuses
• Test Status:
“T” – the register has no effect unless the TEST-EN bit in
register LMCR1 is set to 1
• Channel Selection:
“N” – the register affects both SLICOFI-2x channels,
“Y” – the register affects a specific SLICOFI-2x channel
The line is organized as follows (with example):
Offset Name Detailed Name
27_H
TSTR1 Test Register 1
Reset
Value
00_H
Test
T
Per
Channel
Y
Preliminary Data Sheet
142
DS3, 2003-07-11