TLE6288R Datasheet, PDF (14/23 Pages) Infineon Technologies AG – Smart 6 Channel Peak&Hold Switch

Preliminary Datasheet TLE6288 R
7 Diagnostics
detailled description of the diagnosis will be added
8 SPI
The SPI is a Serial Peripheral Interface with 4 digital pins
and an 16 bit shift register. The SPI is used to configure
and program the device, turn on and off channels and to
read detailled diagnostic information.
CS
SCLK
SI
SO
SPI
8.1 SPI Signal Description:
CS - Chip Select. The system microcontroller selects the TLE 6288 R by means of the CS pin. When-
ever the pin is in a logic low state, data can be transferred from the µC and vice versa.
CS = H : Any signals at the SCLK and SI pins are ignored and SO is forced into a high impedance
state.
LSB
MSB
internal logic registers
CS
SI
Serial input
data MSB first
16 bit SPI shift register
CS
diagnosis register
SO
Serial output
(diagnosis)
MSB first
LSB
MSB
CS = HÆL :
• diagnostic information is transferred from
the diagnosis register into the SPI shift
register.
• serial input data can be clocked into the
SPI shift register from then on
• SO changes from high impedance state to
logic high or low state corresponding to
the SO bits
CS = L : SPI is working like a shift register. With each clock signal the state of the SI is read into the
SPI shift-register and one diagnosis bit is written out of SO.
CS = LÆH:
• transfer of SI bits from SPI shift register into the internal logic registers
• reset of diagnosis register if sent command was valid
To avoid any false clocking the serial clock input pin SCLK should be logic high state (if CKLProg=L;
low state if CLKProg=H) during high to low transition of CS .
SCLK - Serial Clock. The serial clock pin clocks the internal SPI shift register of the TLE 6288 R. The
serial input (SI) accepts data into the input SPI shift register on the rising edge of SCLK (if CKLProg=L;
falling edge if CLKProg=H) while the serial output (SO) shifts diagnostic information out of the SPI shift
register on the falling edge (if CKLProg=L; rising edge if CLKProg=H) of serial clock. It is essential that
the SCLK pin is in a logic high state (if CKLProg=L; low state if CLKProg=H) whenever chip select CS
makes any transition.
SI - Serial Input. Serial data bits are shifted in at this pin, the most significant bit (MSB) first. SI infor-
mation is read in on the rising edge of SCLK (if CKLProg=L; falling edge if CLKProg=H). Input data is
latched in the SPI shift register and then transferred to the internal registers of the logic.
The input data consist of 16 bit, made up of 4 control bits and 12 data bits. The control word is used to
program the device, to operate it in a certain mode as well as providing diagnostic information (see SPI
Commands).
SO - Serial Output. Diagnostic data bits are shifted out serially at this pin, the most significant bit (MSB)
first. SO is in a high impedance state until the CS pin goes to a logic low state. New diagnostic data will
appear at the SO pin following the falling edge of SCLK (if CKLProg=L; rising edge if CLKProg=H).
Vp2
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13.01.2003