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XC2361A_15 Datasheet, PDF (13/127 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance
XC2361A, XC2363A, XC2364A, XC2365A
XC2000 Family / Base Line
Summary of Features
Table 5
Interface Channel Association (cont’d)
Total Number
Available Channels
4 serial channels
U0C0, U0C1, U1C0, U1C1
2 serial channels
U0C0, U0C1
The XC236xA types are offered with several SRAM memory sizes. Figure 1 shows the
allocation rules for PSRAM and DSRAM. Note that the rules differ:
• PSRAM allocation starts from the lower address
• DSRAM allocation starts from the higher address
For example 8 Kbytes of PSRAM will be allocated at E0’0000h-E0’1FFFh and 8 Kbytes
of DSRAM will be at 00’C000h-00’DFFFh.
E7'FFFFh
(EF'FFFFh)
Reserved for
PSRAM
00'DFFFh
Available
DSRAM
Available
PSRAM
E0'0000h
(E8'0000h)
Figure 1 SRAM Allocation
00'8000h
Reserved for
DSRAM
MC_XC_SRAM_ALLOCATION
Data Sheet
13
V2.12, 2014-06