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TLE6711_07 Datasheet, PDF (13/25 Pages) Infineon Technologies AG – Multifunctional Voltage Regulator and Watchdog
TLE 6711
Circuit Description
4.3.1 Boost Status Output OVL
For supervision of the Boost output voltage an open drain DMOS output is used. The output is high impedance in
normal operation and low during the warning.
The OVL goes LOW if the PWM comparator output (see Figure 8) remains HIGH for clock time period. This occurs
when the Error-Signal falls below the minimum value of the Error-Ramp, this mean that Boost voltage falls below
a certain threshold voltage.
The OVL output used as a warning for insufficient Boost voltage.
4.4
Buck Converter
A stabilized logic supply voltage (typ. 5 V) for general purpose is realized in the system by a buck converter. An
external buck-inductance LBU is PWM switched by a high side DMOS power transistor with the programmed
frequency (pin R).
The buck regulator supply is given by the boost converter output VBOOST, in case of a battery power-down the
stored energy of the boost converter capacitor is used.
Like the boost converter, the buck converter uses the temperature compensated bandgap reference voltage
(typ. 2.8 V) for its regulation loop.
This reference voltage is connected to the non-inverting input of the error amplifier and an internal voltage divider
supplies the inverting input. Therefore the output voltage VCC is fixed due to the internal resistor ratio to typ. 5.0 V.
The output of the error amplifier goes to the inverting input of the PWM comparator as well as to the buck
compensation output BUC.
When the error amplifier output voltage exceeds the sawtooth voltage the output power MOS-transistor is switched
on. So the duration of the output transistor conduction phase depends on the VCC level. A logic signal PWM with
variable pulse width is generated.
BUC
Pin 6
VCC
Pin 7
RProt1
200 Ω
VCC
RVCC1
22kΩ
Error
AMP
RVCC2
28kΩ
= VREF
2.8 V
GND GND
VCC
RVCC3
39.7k Ω
R VCC4
10.3kΩ
OV
COMP H when
+
OV at VCC
-
= VthOV
1.2 V
GND GND
UV
H when COMP
UV at VBoost
=
VthUV
4V
L when
OC
COMP
GND Overcurrent
VthOC
18 mV
L when
Overcurrent
Error-
Signal
PWM
COMP
H when
Error-Signal
<
Error-Ramp
Error-
Ramp
L when
Tj > 175 ˚C
Output Stage
OFF when H
NOR 1
1
Error-FF
R& Q
OFF when H
PWM-FF
R& Q
H = INV
OFF 1
NAND 2
&
&
Q
S
Boost
Driver
Supply
H=
ON
Gate
Driver
VBoost
Pin 9
RSense
18 mΩ
BDS
Pin 10
Power
D-MOS
BUO
Pin 8
R
Pin 1
Oscillator
Vmax
Vmin
tr tf tr t
Schmitt-trigger 1
&
Vhigh
Q
S
Ramp Vlow tr tf tr t Clock
AEB02947
Figure 10 Buck Converter Block Diagram
Data Sheet
13
Rev. 3.4, 2007-08-16