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C505CA-4RC Datasheet, PDF (13/22 Pages) Infineon Technologies AG – 8-bit Single-Chip Microcontroller (Bare Die Delivery)
C505CA-4RC
Step BB
Table 2
Pad Definition and Functions
Symbol Pad In/ Position
Num. Out [µm]
(I/O) x
y
Function
P1.2 47 I/O 0
1129 Port 1 general Input/Output (quasi-bidirectional)/
Analog input channel 2 / interrupt 5 input /
capture/compare channel 2 I/O
P1.3 48 I/O 0
776 Port 1 general Input/Output (quasi-bidirectional)/
Analog input channel 3 /interrupt 6 input /
capture/compare channel 3 I/O
P1.4 49 I/O 0
453 Port 1 general Input/Output (quasi-bidirectional)/
Analog input channel 4
Note: All VSS pads and all VDD pads must be connected to the system ground and the
power supply, respectively.
The pad definitions and locations in this table are only valid for the indicated device
and design step.
Handling Of Unconnected Pads
Signal input stages may generate undesired switching noise and cross-current when left
open. Respect the following precautions for unconnected (not bonded) pads:
Table 3
Precautions for Unconnected Pads
Pad Type
Recommended Action Related Pads
Power Supply
Standard I/O
pads(except P0)
Always connect!
Can be left
VDD, VSS, VAREF, VAGND
P11), P2, P3, P4
Port 0
Set the corresponding P0
pad latches to ’0’s
Required control
lines
Always connect!
RESET, XTAL1,EA
Optional control
lines
Can be left open
ALE, PSEN, XTAL2
1) Avoid to set unconnected P1 pad as analog input if left open. However, P1 is set as digital I/O by default after
reset.
Data Sheet
13
V1.3, 2000-12