XC164CM_04 Datasheet, PDF (12/14 Pages) Infineon Technologies AG – 16-Bi t Single-Chip Microcontroller

XC164CM-8FF
Delta Sheet XC164CM-8FF to XC164CS-16FF
Table 4
Pin Definitions and Functions (cont’d)
Symbol Pin Input Function
Num. Outp.
P3
P3.1 28
P3.2 29
P3.3 30
P3.4 31
P3.5 32
P3.6 33
P3.7 34
P3.8 35
P3.9 36
P3.10 37
P3.11 38
P3.13 39
P3.15 42
IO Port 3 is a 13-bit bidirectional I/O port. Each pin can be
programmed for input (output driver in high-impedance state)
or output (configurable as push/pull or open drain driver). The
input threshold of Port 3 is selectable (standard or special).
The following Port 3 pins also serve for alternate functions:
O
T6OUT GPT2 Timer T6 Toggle Latch Output,
I/O RxD1
ASC1 Data Input (Async.) or Inp./Outp. (Sync.),
I
EX1IN Fast External Interrupt 1 Input (alternate pin A),
I
TCK
Debug System: JTAG Clock Input
I
CAPIN GPT2 Register CAPREL Capture Input,
I
TDI
Debug System: JTAG Data In
O
T3OUT GPT1 Timer T3 Toggle Latch Output,
O
TDO
Debug System: JTAG Data Out
I
T3EUD GPT1 Timer T3 External Up/Down Control Input,
I
TMS
Debug System: JTAG Test Mode Selection
I
T4IN
GPT1 Timer T4 Count/Gate/Reload/Capture Inp
O
TxD1
ASC1 Clock/Data Output (Async./Sync.),
O
BRKOUT Debug System: Break Out
I
T3IN
GPT1 Timer T3 Count/Gate Input
I
T2IN
GPT1 Timer T2 Count/Gate/Reload/Capture Inp
I
BRKIN Debug System: Break In
I/O MRST0 SSC0 Master-Receive/Slave-Transmit In/Out.
I/O MTSR0 SSC0 Master-Transmit/Slave-Receive Out/In.
O
TxD0
ASC0 Clock/Data Output (Async./Sync.),
I
EX2IN Fast External Interrupt 2 Input (alternate pin B)
I/O RxD0
ASC0 Data Input (Async.) or Inp./Outp. (Sync.),
I
EX2IN Fast External Interrupt 2 Input (alternate pin A)
I/O SCLK0 SSC0 Master Clock Output / Slave Clock Input.,
I
EX3IN Fast External Interrupt 3 Input (alternate pin A)
O
CLKOUT System Clock Output (=CPU Clock),
O
FOUT
Programmable Frequency Output
TRST 62 I
Test-System Reset Input. A high level at this pin activates the
XC164CM’s debug system and/or the non default
configuration functions on ports 1 and 9. For normal system
operation, pin TRST should be held low.
Draft Delta Sheet
8
V1.0D3, 2004-03