TLE7183QU Datasheet, PDF (12/28 Pages) Infineon Technologies AG – 3 Phase Driver IC Automotive Power

TLE7183QU
Description and Electrical Characteristics
5.1.2 Operation at Vs<12V - Integrated Charge Pumps
In 12V automotive applications, correct operation has to be assured also at lower supply voltages, even at 9V. At
low supply voltages conventional bridge drivers provide clearly less than 9V to the gate of an external MOSFET.
However low gate-source voltage increases R_DSon of the MOSFET. This leads to an undesired, higher power
dissipation.
The two charge pumps circuitries of TLE7183QU address this problem enabling operation even at lower supply
voltages. Their operational capability does not depend on a specific pulse pattern of the MOSFETs overcoming
duty cycle limitations which are inherent to drivers that use the bootstrap principle instead. Therefore TLE7183QU
supports the complete duty cycle range from 0 to 100%. This simplifies the usabilty in all applications and
especially when used with block wise commutation. The charge pumps are only deactivated if the device is set to
sleep mode using INH.
The first charge pump supplies the low side MOSFETs and the corresponding output stages with sufficient voltage
to assure 10V gate-source voltage even if Vs<10V. In addition it also supplies most of the internal circuitries,
including the second charge pump.
The second charge pump supplies the high side MOSFETs and the corresponding output stages. It is pumped on
the voltage of Vs.
Each charge pump circuitry requires external pump (CPx) and buffer (CBx) capacitors. The output of the first
charge pump is CB1 which is referenced to GND. The output of the second charge pump is CB2 which is
referenced to VDH. VDH and Vs are usually in the same voltage range. The driver is not designed to have
significant higher voltages at VDH compared to Vs. This would lead to reduced supply voltages for the high side
output stages.
The outputs of both charge pumps are regulated. The first charge pump doubles the supply voltage for Vs<8V.
For 8V<Vs<15V, its output is regulated to a typical voltage of 15V. For Vs>15V, its output increases linearly but
does not exceed 25V.
For a proper wake up of the device at V_VsWU, it is not permitted to have any PWM patterns at the input pins ILx and
IHx before the charge pumps have ramped up to their final values unless the output stages have been switched
off by setting one of the ENAx pins to low.
The size of the charge pump capacitors (pump capacitors CPx as well as buffer capacitors CBx) can be varied
between 1 µF and 4.7 µF. Yet, larger capacitor values result in higher charge pump voltages and less voltage
ripple on the charge pump buffer capacistors CBx (which supply the internal circuits as well as the external
MOSFETs, pls. see above). Besides the capacitance values the ESR of the buffer capacitors CBx determines the
voltage ripple as well. It is recommended to use buffer capacitors CBx that have small ESR.
Please see also Chapter 5.1.3 for capacitor selection.
5.1.3 Sleep Mode
If the INH pin is set to low, the driver will be set to sleep mode. The INH pin switches off the complete supply
structure of the device and finally leads to an undervoltage shut down of the complete driver. Enabling the device
with the INH pin means to switch on the supply structure. The device will run through power on reset during wake
up. It is recommended to perform a reset using ENAx after wake up to remove possible ERRx signals. Reset is
performed by keeping one or more ENAx pins low until the charge pump voltages have ramped up.
Enabling and disabling with the INH pin is not very fast. Please consider using the ENAx pins to speed things up.
If the TLE7183QU is in sleep mode or if the supply voltage Vs is not available, then the driver IC is not supplied,
the charge pumps are inactive and the charge pump capacitors are discharged. Pin CB2 (+ terminal of buffer
capacitor 2) will decay to GND. If the battery voltage is still applied to VDH (- terminal of buffer capacitor 2) the
buffer capacitor 2 will slowly be charged to battery voltage with reversed polarity compared to the one during
regular operation. Hence, it is important to use a buffer capacitor 2 (CB2) that can withstand both, +25 V in regular
operation mode and -V_BAT in sleep mode, e.g. a ceramic capacitor. If there is load dump in sleep mode, then the
negative voltage across CB2 will be clamped to -31 V (CB2 referenced to VDH).
Data Sheet
12
Rev. 1.1, 2016-01-28