TLE9261-3QXV33 Datasheet, PDF (112/186 Pages) Infineon Technologies AG – Mid-Range System Basis Chip Family

TLE9261-3QXV33
Supervision Functions
14.4
Under Voltage VS and VSHS
If the supply voltage VS reaches the under voltage threshold V_S,UV then the SBC does the following measures:
• SPI bit VS_UV is set. No other error bits are set. The bit can be cleared once the condition is not present
anymore,
• VCC3 is disabled (see Chapter 8.2) unless the control bit VCC3_VS_ UV_OFF is set
• The VCC1 short circuit protection becomes inactive (see Chapter 14.7). However, the thermal protection of
the device remains active.
If the under voltage threshold is exceeded (VS rising) then functions will be automatically enabled again.
If the supply voltage VSHS passes below the under voltage threshold (V_SHS,UVD) the SBC does the following
measures:
• HS1...4 are acting accordingly to the SPI setting (see Chapter 9)
• SPI bit VSHS_UV is set. No other error bits are set. The bit can be cleared once the condition is not present
anymore,
• VCC1, VCC2, WKx and CAN are not affected by VSHS under voltage
14.5
Over Voltage VSHS
If the supply voltage VSHS reaches the over voltage threshold (V_SHS,OVD) the SBC triggers the following measures:
• HS1...4 are acting accordingly to the SPI setting (see Chapter 9)
• SPI bit VSHS_OV is set. No other error bits are set. The bit can be cleared once the condition is not present
anymore,
• VCC1, VCC2, VCC3, WKx and CAN are not affected by VS over voltage
14.6
VCC1 Over-/ Under Voltage and Under Voltage Prewarning
14.6.1 VCC1 Under Voltage and Under Voltage Prewarning
A first-level voltage detection threshold is implemented as a prewarning for the microcontroller. The prewarning
event is signaled with the bit VCC1_ WARN. No other actions are taken.
As described in Chapter 14.1 and Figure 52, a reset will be triggered (RO pulled ‘low’) when the V_CC1 output
voltage falls below the selected under voltage threshold (V_RTx). The bit VCC1_UV is set and the SBC will enter
SBC Restart Mode.
Note: The VCC1_ WARN or VCC1_UV bits are not set in Sleep Mode as V_CC1 = 0V in this case
Data Sheet
112
Rev. 1.1, 2014-10-23