ICE2A380P2 Datasheet, PDF (11/20 Pages) Infineon Technologies AG – Off-Line SMPS Current Mode Controller with integrated 800V CoolMOS™

CoolSET™-F2
ICE2A380P2
Functional Description
the Current-Limit Comparator cannot switch off the
gate drive.
3.5.2 Propagation Delay Compensation
In case of overcurrent detection by I_Limit the shut down
of CoolMOS™ is delayed due to the propagation delay
of the circuit. This delay causes an overshoot of the
peak current I_peak which depends on the ratio of dI/dt of
the peak current (see Figure 14).
.
I_Sense
I_peak2
I_peak1
I_Limit
Signal1
I_Overshoot2
Signal2
t_{Propagation Delay}
I_Overshoot1
t
Figure 14 Current Limiting
The overshoot of Signal2 is bigger than of Signal1 due
to the steeper rising waveform.
A propagation delay compensation is integrated to
bound the overshoot dependent on dI/dt of the rising
primary current. That means the propagation delay
time between exceeding the current sense threshold
V_csth and the switch off of CoolMOS™ is compensated
over temperature within a range of at least.
0≤
R _{S e n s e}×
-^d---^I--^p--^e--^a--^k
dt
≤
-^d---^V----^S--^e-ⁿ--^s--^e
dt
V_OSC
max. Duty Cycle
V_Sense
V_csth
off time
t
Propagation Delay
Signal1
t
Signal2
Figure 15 Dynamic Voltage Threshold V_csth
The propagation delay compensation is done by
means of a dynamic threshold voltage V_csth (see Figure
15). In case of a steeper slope the switch off of the
driver is earlier to compensate the delay.
E.g. I_peak = 0.5A with R_Sense = 2. Without propagation
delay compensation the current sense threshold is set
to a static voltage level V_csth=1V. A current ramp of
dI/dt = 0.4A/µs, that means dV_Sense/dt = 0.8V/µs, and a
propagation delay time of i.e. t_{Propagation Delay} =180ns
leads then to a I_peak overshoot of 12%. By means of
propagation delay compensation the overshoot is only
about 2% (see Figure 16).
V
1.3
1.25
1.2
1.15
1.1
1.05
1
0.95
0.9
0
with compensation
without compensation
0.2 0.4 0.6 0.8
1 1.2 1.4 1.6 1.8
dV_Sense
dt
2 V/us
Figure 16 Overcurrent Shutdown
3.6
PWM-Latch
The oscillator clock output applies a set pulse to the
PWM-Latch when initiating CoolMOS™ conduction.
After setting the PWM-Latch can be reset by the PWM-
OP, the Soft-Start-Comparator, the Current-Limit-
Comparator, Comparator C3 or the Error-Latch of the
Protection Unit. In case of resetting the driver is shut
down immediately.
3.7
Driver
The driver-stage drives the gate of the CoolMOS™ and
is optimized to minimize EMI and to provide high circuit
efficiency. This is done by reducing the switch on slope
when reaching the CoolMOS™ threshold. This is
achieved by a slope control of the rising edge at the
driver’s output (see Figure 17) to the CoolMOS™ gate.
Thus the leading switch on spike is minimized. When
CoolMOS™ is switched off, the falling shape of the
driver is slowed down when reaching 2V to prevent an
overshoot below ground. Furthermore the driver circuit
is designed to eliminate cross conduction of the output
stage. At voltages below the undervoltage lockout
threshold V_VCCoff the gate drive is active low.
Version 0.0
11
23 Sep 2004