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TLE7230R_05 Datasheet, PDF (10/14 Pages) Infineon Technologies AG – Smart Octal Low-Side Switch Low Quiescent Current< 10μA Overvoltage
Data Sheet TLE 7230R
Register Description:
Name Nr. 7
6
5
4
3
2
1
0 ADDR
MAP
BOL
OVL
OVT
SLE
STA
CTL
1 Ch8 Ch7 Ch6 Ch5 Ch4 Ch3 Ch2 Ch1 0 0 1
2 Ch8 Ch7 Ch6 Ch5 Ch4 Ch3 Ch2 Ch1 0 1 0
3 Ch8 Ch7 Ch6 Ch5 Ch4 Ch3 Ch2 Ch1 0 1 1
4 Ch8 Ch7 Ch6 Ch5 Ch4 Ch3 Ch2 Ch1 1 0 0
5 Ch8 Ch7 Ch6 Ch5 Ch4 Ch3 Ch2 Ch1 1 0 1
6 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 1 1 0
7 Ch8 Ch7 Ch6 Ch5 Ch4 Ch3 Ch2 Ch1 1 1 1
default
08H
00H
00H
00H
00H
00H
00H
Input Mapping Register (MAP)
Defines to which outputs the input IN4 is assigned (can be one up to all)
0.. No connection to IN4
1.. Output can be controlled with IN4 pin
Boolean operation Register (BOL)
The logic operation for serial and parallel control signal can be individually defined for each channel.
0.. Logic "OR"
1.. Logic "AND"
Overload Behavior Register (OVL)
The overload behavior of individual channels can be defined.
0.. Current limit without shutdown of the channel
1.. Current limit with latching overload shutdown of the channel
Overtemperature Behavior Register (OVT)
The overtemperature behavior of individual channels can be defined
0.. Auto restart after cooling down
1.. Latching shutdown on overtemperature
Switching Speed / Slew Rate Register (SLE)
The switching speed of individual channels can be defined.
0.. fast (10µs)
1.. slow (50µs)
Output State Register (STA)
Reads back the state of the output (this register is read-only)
0: DMOS off
1: DMOS on
Serial Output Control Register (CTL)
Sets the serial control bits for switching of output stages.
0: Output off
1: Output on
V2.0
Page 10
2005-10-05