TLE6365G Datasheet, PDF (10/17 Pages) Infineon Technologies AG – Step Down Voltage-Regulator with Reset

TLE 6365
Buck Converter
A stabilized logic supply voltage (typ. 5 V) for general purpose is realized in the system
by a buck converter. An external buck-inductance L_BU is PWM switched by a high side
DMOS power transistor with the programmed frequency (pin R).
The buck converter uses the temperature compensated bandgap reference voltage
(typ. 2.8 V) for its regulation loop.
This reference voltage is connected to the non-inverting input of the error amplifier and
an internal voltage divider supplies the inverting input. Therefore the output voltage V_CC
is fixed due to the internal resistor ratio to typ. 5.0 V.
The output of the error amplifier goes to the inverting input of the PWM comparator as
well as to the buck compensation output BUC.
When the error amplifier output voltage exceeds the sawtooth voltage the output power
MOS-transistor is switched on. So the duration of the output transistor conduction phase
depends on the V_CC level. A logic signal PWM with variable pulse width is generated.
R_Prot1
BUC ^200Ω
Pin 3
V_CC
Pin 5 _VCC
R_VCC1
22R
R_VCC2
28R
GND
-
Error
AMP
+
V_REF
2,8V
GND
Oscillator
R
V_max
Pin 1
V_min
t_r t_f t_r t
V_CC
R_VCC3
39R7
R_VCC4
10R3
GND
+
OV
COMP H when
-
V_thOV
OV at V_CC
1,2V
GND
L when
Overcurrent
H when UV
at V_BOOST
NOR1
Error-Signal
Error-Ramp
-
PWM
COMP
+
H when
Error-Signal
<
Error-Ramp
L when
T_j >175°C
NOR 1
>1 Output Stage OFF when H
ERROR-FF
R
&
Q
OFF when H
Schmitt-trigger 1
V_high
Ramp
S&
Q
Clock
V_low
t_r t_f t_r t
-
UV
COMP
+
V_thUV
4V
GND
L when
Overcurrent
R
PWM-FF
H=
Q OFF
INV
&
1
NAND 2
&
S&
Q
OC
V_thOC
COMP 18mV
Gate
Driver
Supply
H=
ON
Gate
Driver
R_Sense
18mΩ
V_S
Pin 8
BDS
Pin 6
Power
D-MOS
BUO
Pin 7
Figure 4 Buck Converter Block Diagram
External loop compensation is required for converter stability, and is formed by
connecting a compensation resistor-capacitor series-network (R_BUC, C_BUC) between pin
BUC and GND.
Data Sheet Rev. 1.7
10
2003-06-02