IDT7024S Datasheet, PDF (9/20 Pages) Integrated Device Technology – HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM

IDT7024S/L
HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE⁽⁵⁾
Symbol
Parameter
IDT7024X15
Com'l. Only
Min. Max.
IDT7024X17
Com'l. Only
Min. Max.
WRITE CYCLE
tWC
Write Cycle Time
tEW
Chip Enable to End-of-Write⁽³⁾
15
—
17
—
12
—
12
—
tAW
Address Valid to End-of-Write
tAS
Address Set-up Time⁽³⁾
12
—
12
—
0
—
0
—
tWP
Write Pulse Width
12
—
12
—
tWR
Write Recovery Time
0
—
0
—
tDW
Data Valid to End-of-Write
10
—
10
—
tHZ
Output High-Z Time^{(1, 2)}
—
10
—
10
tDH
Data Hold Time⁽⁴⁾
0
—
0
—
tWZ
Write Enable to Output in High-Z^{(1, 2)}
—
10
—
10
tOW
Output Active from End-of-Write^{(1, 2, 4)}
0
—
0
—
tSWRD
SEM Flag Write to Read Time
5
—
5
—
tSPS
SEM Flag Contention Window
5
—
5
—
IDT7024X20
Min. Max.
20
—
15
—
15
—
0
—
15
—
0
—
15
—
—
12
0
—
—
12
0
—
5
—
5
—
IDT7024X25
Min. Max. Unit
25
— ns
20
— ns
20
— ns
0
— ns
20
— ns
0
— ns
15
— ns
—
15 ns
0
— ns
—
15 ns
0
— ns
5
— ns
5
— ns
Symbol
Parameter
IDT7024X35
Min. Max.
IDT7024X55
Min. Max.
IDT7024X70
Mil. Only
Min. Max. Unit
WRITE CYCLE
tWC
Write Cycle Time
tEW
Chip Enable to End-of-Write⁽³⁾
35
—
55
—
70
— ns
30
—
45
—
50
— ns
tAW
Address Valid to End-of-Write
tAS
Address Set-up Time⁽³⁾
30
—
45
—
50
— ns
0
—
0
—
0
— ns
tWP
Write Pulse Width
25
—
40
—
50
— ns
tWR
Write Recovery Time
0
—
0
—
0
— ns
tDW
tHZ
tDH
tWZ
tOW
tSWRD
tSPS
Data Valid to End-of-Write
Output High-Z Time^{(1, 2)}
Data Hold Time⁽⁴⁾
Write Enable to Output in High-Z^{(1, 2)}
Output Active from End-of-Write^{(1, 2, 4)}
SEM Flag Write to Read Time
SEM Flag Contention Window
15
—
30
—
40
— ns
—
15
—
25
—
30 ns
0
—
0
—
0
— ns
—
15
—
25
—
30 ns
0
—
0
—
0
— ns
5
—
5
—
5
— ns
5
—
5
—
5
— ns
NOTES:
2740 tbl 14
1. Transition is measured ±500mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access RAM, CE = VIL, UB or LB = VIL, SEM = VIH. To access semaphore, CE = VIH or UB & LB = VIH, and SEM = VIL. Either condition must be valid
for the entire tEW time.
4. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary
over voltage and temperature, the actual tDH will always be smaller than the actual tOW.
5. "X" in part numbers indicates power rating (S or L).
6.15
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