IDT7024S Datasheet, PDF (1/20 Pages) Integrated Device Technology – HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM

Integrated Device Technology, Inc.
HIGH-SPEED
4K x 16 DUAL-PORT
STATIC RAM
IDT7024S/L
FEATURES:
• True Dual-Ported memory cells which allow simulta-
neous access of the same memory location
• High-speed access
— Military: 20/25/35/55/70ns (max.)
— Commercial: 15/17/20/25/35/55ns (max.)
• Low-power operation
— IDT7024S
Active: 750mW (typ.)
Standby: 5mW (typ.)
— IDT7024L
Active: 750mW (typ.)
Standby: 1mW (typ.)
• Separate upper-byte and lower-byte control for
multiplexed bus compatibility
• IDT7024 easily expands data bus width to 32 bits or
more using the Master/Slave select when cascading
more than one device
• M/S = H for BUSY output flag on Master
M/S = L for BUSY input on Slave
• Busy and Interrupt Flags
• On-chip port arbitration logic
• Full on-chip hardware support of semaphore signaling
between ports
• Devices are capable of withstanding greater than 2001V
electrostatic discharge.
• Fully asynchronous operation from either port
• Battery backup operation—2V data retention
• TTL-compatible, single 5V (±10%) power supply
• Available in 84-pin PGA, 84-pin quad flatpack, 84-pin
PLCC, and 100-pin Thin Quad Plastic Flatpack
• Industrial temperature range (–40°C to +85°C) is avail-
able, tested to military electrical specifications
FUNCTIONAL BLOCK DIAGRAM
R/WL
UBL
R/ WR
UBR
LBL
LBR
CEL
CER
OEL
OER
I/O8L-I/O 15L
I/O0L-I/O 7L
BUSYL(1,2)
A11L
A0L
NOTES:
1. (MASTER):
BUSY is output;
(SLAVE): BUSY
is input.
2. BUSY outputs
and INT outputs
are non-tri-stated
push-pull.
SEML
INTL(2)
I/O
Control
I/O
Control
Address
Decoder
12
CEL
OEL
R/ WL
MEMORY
ARRAY
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
M/S
Address
Decoder
12
CER
OER
R/WR
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
6.15
I/O8R-I/O 15R
I/O0R-I/O 7R
BUSYR(1,2)
A11R
A0R
SEMR
INTR(2)
2740 drw 01
OCTOBER 1996
DSC-2740/6
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