ICS9DB102 Datasheet, PDF (9/13 Pages) Integrated Circuit Systems – 2 Output PCI Express Buffer with CLKREQ Function

ICS9DB102
2 Output PCI Express* Buffer with CLKREQ# Function
SMBus Table: Device Control Register, READ/WRITE ADDRESS (D4/D5)
Byte 0
Pin #
Name
Control Function Type
0
Bit 7
-
SW_EN
Enables SMBus Control RW ^{Functions controlled by}
SMBus registers
Bit 6
-
RESERVED
RW
-
Bit 5
-
RESERVED
RW
-
Bit 4
-
RESERVED
RW
-
Bit 3
-
RESERVED
RW
-
Bit 2
-
RESERVED
RW
-
Bit 1
-
PLL BW #adjust Selects PLL Bandwidth RW
Low BW
Bit 0
-
PLL Enable
Bypasses PLL for board
PLL bypassed (fan out
test
RW
mode)
1
Functions controlled
by device pins
High BW
PLL enabled (ZDB
mode)
PWD
1
X
X
X
X
X
1
1
SMBus Table: Output Enable Register
Byte 1
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Control Function
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
-
-
-
-
-
-
-
-
PWD
X
X
X
X
X
X
X
X
SMBus Table: Function Select Register
Byte 2
Pin #
Name
Bit 7
Bit 6
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Control Function
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
-
-
-
-
-
-
-
-
PWD
X
X
X
X
X
X
X
X
IDT^TM/ICS^TM 2 Output Express* Buffer with CLKREQ# Function
9
ICS9DB102 REV F 08/06/07