ICS8S89834I Datasheet, PDF (8/17 Pages) Integrated Device Technology – Low Skew, 2-to-4 LVCMOS/LVTTL-to-LVPECL/ECL Clock Multiplexer

ICS8S89834I Data Sheet
LOW SKEW, 2-TO-4 LVCMOS/LVTTL-TO-LVPECL/ECL CLOCK MULTIPLEXER
Parameter Measurement Information, continued
IN1
nQ0:nQ3
20%
Q0:Q3
80%
t_R
80%
t_F
V_OUT
20%
IN2
SEL
nQ0:nQ3
Q0:Q3
t sw
Output Rise/Fall Time
Switch Over
V_IN, V_OUT
800mV
(typical)
Differential Output Voltage Swing
V_{DIFF_IN}, V_{DIFF_OUT}
1600mV
(typical)
nQ0:nQ3
Q0:Q3
t _PW
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
Output Duty Cycle/Pulse Width/Period
Application Information
Recommendations for Unused Input and Output Pins
Inputs:
Outputs:
IN Inputs
For applications not requiring the use of a clock input, it can be left
floating. Though not required, but for additional protection, a 1kΩ
resistor can be tied from the IN input to ground.
LVPECL Outputs
All unused LVPECL outputs can be left floating. We recommend that
there is no trace attached. Both sides of the differential output pair
should either be left floating or terminated.
LVCMOS Control Pins
All control pins have internal pullups; additional resistance is not
required but can be added for additional protection. A 1kΩ resistor
can be used.
ICS8S89834AKI REVISION A FEBRUARY 4, 2010
8
©2010 Integrated Device Technology, Inc.