ICS853S024 Datasheet, PDF (8/16 Pages) Integrated Device Technology – LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL FANOUT BUFFER

ICS853S024
LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL FANOUT BUFFER
PRELIMINARY
Recommendations for Unused Input and Output Pins
Inputs:
Outputs:
CLK/nCLK Inputs
For applications not requiring the use of the differential input, both
CLK and nCLK can be left floating. Though not required, but for
additional protection, a 1kΩ resistor can be tied from CLK to
ground.
LVPECL Outputs
All unused LVPECL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
Termination for 3.3V LVPECL Outputs
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must be
used for functionality. These outputs are designed to drive 50Ω
transmission lines. Matched impedance techniques should be
used to maximize operating frequency and minimize signal
distortion. Figures 3A and 3B show two different layouts which are
recommended only as guidelines. Other suitable clock layouts may
exist and it would be recommended that the board designers
simulate to guarantee compatibility across all printed circuit and
clock component process variations.
Z_o = 50Ω
FOUT
FIN
Z_o = 50Ω
50Ω
RTT =
1
((V_OH + V_OL) / (V_CC – 2)) – 2
Z_o
50Ω
V_CC - 2V
RTT
Figure 3A. 3.3V LVPECL Output Termination
FOUT
3.3V
125Ω
125Ω
Z_o = 50Ω
FIN
Z_o = 50Ω
84Ω
84Ω
Figure 3B. 3.3V LVPECL Output Termination
LOW SKEW LVPECL FANOUT BUFFER
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ICS853S024AY REV. A APRIL 30, 2008