ADC1005S060 Datasheet, PDF (8/18 Pages) NXP Semiconductors – Single 10 bits ADC, up to 60 MHz

Integrated Device Technology
ADC1005S060
Single 10 bits ADC, up to 60 MHz
Table 6. Characteristics …continued
V_CCA = 4.75 V to 5.25 V; V_CCD = 4.75 V to 5.25 V; AGND and DGND shorted together; T_amb = 0 C to 70 C; typical values
measured at V_CCA = V_CCD = 5 V; V_CCO = 3.3 V; V_RB = 1.3 V; V_RT = 3.7 V; C_L = 10 pF and T_amb = 25 C unless otherwise
specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
E_offset
offset error
middle code
-
1
-
LSB
E_G
gain error
from device to device
[5] _-
0.5
-
%
Bandwidth
B
bandwidth
full-scale sine wave
[6] _-
30
-
MHz
75 % full-scale sine wave
-
45
-
MHz
t_s(LH)
LOW to HIGH
settling time
small signal at mid-scale;
-
V_I = 10 LSB at code 512
full-scale square wave;
[7] _-
see Figure 6
700
-
5
-
MHz
ns
t_s(HL)
HIGH to LOW
full-scale square wave;
[7] _-
5
-
ns
settling time
see Figure 6
Harmonics
_2H
second harmonic f_i = 5 MHz
level
-
68
-
dB
_3H
third harmonic
f_i = 5 MHz
level
-
67
-
dB
THD
SFDR
total harmonic
distortion
spurious free
dynamic range
f_i = 5 MHz
f_i = 15 MHz
f_i = 5 MHz
-
64
-
dB
-
57
-
dB
-
72
dB
Signal-to-Noise ratio^[8]
S/N
signal-to-noise
ratio
Effective bits^[8]
without harmonics;
f_i = 5 MHz
without harmonics;
f_i = 15 MHz
-
58
-
dB
53
57
-
dB
ENOB
effective number
of bits
Two-tone intermodulation^[9]
f_i = 5 MHz
f_i = 10 MHz
f_i = 15 MHz
f_i = 20 MHz
-
9.3
-
bits
-
8.9
-
bits
-
8.8
-
bits
-
8.6
-
bits
_IM
intermodulation f_clk = 60 MHz
suppression
-
67
-
dB
Bit error rate
BER
bit error rate
f_i = 5 MHz; V_I = 16 LSB at
-
code 512
10^13
-
times/samples
Timing (f_clk = 60 MHz; C_L = 10 pF); see Figure 4^[10]
t_d(s)
sampling delay
time
-
0.7
2
ns
t_h(o)
output hold time
t_d(o)
output delay time V_CCO = 2.7 V
V_CCO = 3.3 V
4
-
-
ns
-
10
14
ns
-
9
13
ns
ADC1005S060_3
Product data sheet
Rev. 03 — 2 July 2012
© IDT 2012. All rights reserved.
8 of 18