ICS97U870 Datasheet, PDF (7/13 Pages) Integrated Device Technology – Feedback pins for input to output synchronization

ICS97U8 7 0
Advance Information
Parameter Measurement Information
V_DD
V(CLKC)
0817—07/07/03
ICS97U870
V(CLKC)
GND
Figure 1. IBIS Model Output Load
VDD/2
ICS97U870
-VDD/2
Z = 60Ω
Z = 2.97"
C = 10 pF _{- GND}
R = 10Ω Z = 50Ω
Z = 120Ω
Z = 60Ω
Z = 2.97"
R = 10Ω Z = 50Ω
C = 10 pF
GND
SCOPE
R = 1MΩ
V(TT)^{C = 1 pF}
R = 1MΩ
V(TT)^{C = 1 pF}
Note: V_TT = GND
Figure 2. Output Load Test Circuit
Y_X, FB_OUTC
Y_X, FB_OUTT
tc(n)
tc(n+1)
tjit(cc) = tc(n) ± tc(n+1)
Figure 3. Cycle-to-Cycle Jitter
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