ICS843S1066 Datasheet, PDF (7/12 Pages) Integrated Device Technology – CRYSTAL-TO-3.3V LVPECL CLOCK SYNTHESIZER

ICS843S1066
CRYSTAL-TO-3.3V LVPECL CLOCK SYNTHESIZER
Schematic Example
Figure 5 shows an example of the ICS843S1066 application
schematic. In this example, the device is operated at VCC = 3.3V.
The 18pF parallel resonant 20MHz crystal is used. The C1 = 14pF
and C2 = 14pF are recommended for frequency accuracy. For
different board layout, the C1 and C2 may be slightly adjusted for
optimizing frequency accuracy. Two examples of LVPECL
termination are shown in this schematic. Additional termination
approaches are shown in the LVPECL Termination Application
Note.
VCC
R1
10 C4
10uF
VCCA
C5
0.01u
XTAL_OUT
XTAL_IN
U1
1
2
3
4
VCCA
VEE
XTAL_OUT
XTAL_IN
ICS843S1066
C2
14pF
X1
20MHz
18pF
C1
14pF
Logic Control Input Examples
Set Logic
VCC _{Input to}
'1'
RU1
1K
To Logic
Input
pins
RD1
Not Install
Set Logic
VCC _{Input to}
'0'
RU2
Not Install
To Logic
Input
pins
RD2
1K
VCC
VCC
C3
0.01u
VCC
Q
nQ
8
7
6
5
F_SEL
Q
nQ
F_SEL
VCC=3.3V
3.3V
R2
R3
133
133
Zo = 50 Ohm
+
Zo = 50 Ohm
-
R4
82.5
R5
82.5
Zo = 50 Ohm
Zo = 50 Ohm
R6
50
+
-
R7
50
Optional
R8
Y-Termination
50
Figure 5. ICS843S1066 Schematic Example
IDT™ / ICS™ 3.3V LVPECL CLOCK SYNTHESIZER
7
ICS843S1066CG REV. A AUGUST 27, 2008