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ADC1207S080 Datasheet, PDF (7/20 Pages) NXP Semiconductors – Single 12 bits ADC, up to 80 MHz with direct/ultra high IF sampling
Integrated Device Technology
ADC1207S080
Single 12 bits ADC, up to 80 MHz with direct/ultra high IF sampling
Table 5. Characteristics …continued
VCCA = 4.75 V to 5.25 V; VCCD = 4.75 V to 5.25 V; VCCO = 2.7 V to 3.6 V; AGND and DGND shorted together; Tamb = 40 C
to +85 C; Vi(IN)  Vi(INN) = 0.5 dBFS; Vref(fs) = VCCA  1.87 V; VI(cm) = VCCA  1.95 V; typical values measured at
VCCA = VCCD = 5 V, VCCO = 3.3 V, Tamb = 25 C and CL = 10 pF; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
IIL
LOW-level input current VIL = 0.8 V
IIH
HIGH-level input current VIH = 2.0 V
Digital inputs: pins DEL0 and DEL1
-
1
-
A
-
1
-
A
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
IIL
LOW-level input current VIL = 0.8 V
IIH
HIGH-level input current VIH = 2.0 V
Voltage controlled regulator output: pin CMADC
DGND
-
0.7  VCCD -
-
8
-
20
0.3  VCCD V
VCCD
V
-
A
-
A
VO(cm)
common-mode output
voltage
IL = 0 mA
IL = 2 mA
Reference voltage input: pin FSIN[3]
-
VCCA  1.88 -
V
-
VCCA  1.95 -
V
Vref(fs)
full-scale reference
voltage
-
VCCA  1.80 -
V
Iref(fs)
full-scale reference
current
-
0.1
-
A
Vi(a)(p-p)
peak-to-peak analog
see Figure 5;
-
1.85
-
V
input voltage
Vi = Vi(IN)  Vi(INN);
VI(cm) = VCCA  1.95 V
Full-scale voltage controlled regulator output: pin FSOUT
VO(ref)
reference output voltage IL = Iref(fs)
IL = 2 mA
Digital outputs: pins D11 to D0, IR and CCS
-
VCCA  1.80 -
V
-
VCCA  1.82 -
V
Output levels
VOL
LOW-level output
IOL = 2 mA
voltage
DGND
-
DGND + 0.5 V
VOH
HIGH-level output
IOH = 0.4 mA
voltage
VCCO  0.5 -
VCCO
V
IOZ
OFF-state output current output level between
0.1
0
0.5 V and VCCO
Timing[4]
+0.1
A
td(s)
sampling delay time
th(o)
output hold time
td(o)
output delay time
3-state output delay
CL = 10 pF
CL = 10 pF
CL = 10 pF
-
0.1
2.6
3.8
-
4.7
0.24
ns
-
ns
7.8
ns
tdZH
float to active HIGH
delay time
-
3.6
-
ns
tdZL
float to active LOW
delay time
-
3.9
-
ns
tdHZ
active HIGH to float
delay time
-
9.2
-
ns
tdLZ
active LOW to float
delay time
-
7.2
-
ns
ADC1207S080_3
Product data sheet
Rev. 03 — 2 July 2012
© IDT 2012. All rights reserved.
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