9DBU0241 Datasheet, PDF (7/17 Pages) Integrated Circuit Systems – slew rate for each output

9DBU0241 DATASHEET
Electrical Characteristics–DIF Low-Power HCSL Outputs
TA = T_AMB; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
Slew rate
Slew rate matching
SYMBOL
dV/dt
dV/dt
ΔdV/dt
CONDITIONS
Scope averaging on, fast setting (100MHz)
Scope averaging on, slow setting (100MHz)
Slew rate matching, Scope averaging on
MIN TYP MAX UNITS NOTES
1
2.4 3.5 V/ns 1,2,3
0.7 1.7 2.5 V/ns 1,2,3
9
20
% 1,2,4
Voltage High
Voltage Low
V_HIGH
V_LOW
Statistical measurement on single-ended signal _{630 750 850}
7
using oscilloscope math function. (Scope
mV
averaging on)
-150 26 150
7
Max Voltage
Min Voltage
Vmax
Vmin
Measurement on single ended signal using
763 1150 _mV
7
absolute value. (Scope averaging off)
-300 22
7
Vswing
Vswing
Scope averaging off
300 1448
mV 1,2
Crossing Voltage (abs) Vcross_abs
Scope averaging off
250 390 550 mV 1,5
Crossing Voltage (var)
Δ-Vcross
Scope averaging off
11 140 mV 1,6
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{Measured from differential waveform}
3 _{Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around}
differential 0V.
4 _{Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on}
the average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the
oscilloscope is to use for the edge rate calculations.
5 _{Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising}
edge (i.e. Clock rising and Clock# falling).
6 _{The total variation of all Vcross measurements in any particular system. Note that this is a subset of Vcross_min/max (Vcross}
absolute) allowed. The intent is to limit Vcross induced modulation by setting Δ-Vcross to be smaller than Vcross absolute.
7 _{At default SMBus settings.}
Electrical Characteristics–Current Consumption
TA = T_AMB; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN
I_DDR
VDDR @100MHz
Operating Supply Current
I_DDDIG
VDDIG, All outputs @100MHz
I_DDAO VDDA+VDDO, PLL Mode, All outputs @100MHz
I_DDRPD
VDDR, CKPWRGD_PD# = 0
Powerdown Current
I_DDDIGPD
I_DDAOPD
VDDDIG, CKPWRGD_PD# = 0
VDDA+VDDO, CKPWRGD_PD# = 0
1 _{Guaranteed by design and characterization, not 100% tested in production.}
2 _{Input clock stopped.}
3 _{In bypass mode, the PLL is off and IDDAO is ~50% of this value.}
TYP
3
0.125
13
0.1
0.1
0.7
MAX
6
0.25
17
0.3
0.2
1
UNITS
mA
mA
mA
mA
mA
mA
NOTES
1
1
1
1,2,3
1,2
1,2
REVISION C 04/22/15
7
2 O/P 1.5V PCIE GEN1-2-3 ZDB/FOB W/ZO=100OHMS