9DBL0641 Datasheet, PDF (7/19 Pages) Integrated Device Technology – 6-output 3.3V PCIe Zero-Delay Buffer

9DBL0641 / 9DBL0651 DATASHEET
Electrical Characteristics–DIF Low-Power HCSL Outputs
TA = T_AMB, Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
Slew rate
Slew rate matching
SYMBOL
dV/dt
dV/dt
ΔdV/dt
CONDITIONS
Scope averaging on, fast setting
Scope averaging on, slow setting
Slew rate matching
MIN TYP MAX UNITS NOTES
2
2.8
4 ^V/ns 1,2,3
1.2 1.9 3.1 ^V/ns 1,2,3
7
20
% 1,2,4
Voltage High
Voltage Low
V_HIGH
V_LOW
Statistical measurement on single-ended signal _{660 768 850}
7
using oscilloscope math function. (Scope
mV
averaging on)
-150 -11 150
7
Max Voltage
Min Voltage
Vmax
Vmin
Measurement on single ended signal using
absolute value. (Scope averaging off)
-300
811
-49
1150 _mV
7
7
Crossing Voltage (abs) Vcross_abs
Scope averaging off
250 357 550 mV 1,5
Crossing Voltage (var)
Δ-Vcross
Scope averaging off
14 140 mV 1,6
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{Measured from differential waveform}
3 _{Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around}
differential 0V.
4 _{Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on}
the average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the
oscilloscope is to use for the edge rate calculations.
5 _{Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising}
edge (i.e. Clock rising and Clock# falling).
6 _{The total variation of all Vcross measurements in any particular system. Note that this is a subset of Vcross_min/max (Vcross}
absolute) allowed. The intent is to limit Vcross induced modulation by setting Δ-Vcross to be smaller than Vcross absolute.
7 _{At default SMBus settings.}
Electrical Characteristics–Current Consumption
TA = T_AMB, Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN
I_DDA
VDDA, PLL Mode, @100MHz
Operating Supply Current
I_DD
VDDx, All outputs active @100MHz
I_DDIO
VDDIO, All outputs active @100MHz
I_DDAPD
VDDA, CKPWRGD_PD#=0
Powerdown Current
I_DDPD
VDDx, CKPWRGD_PD#=0
I_DDIOPD
VDDIO, CKPWRGD_PD#=0
1 _{Guaranteed by design and characterization, not 100% tested in production.}
2 _{Input clock stopped.}
TYP
7
17
20
0.6
3.8
0.04
MAX
15
22
25
2
6
0.10
UNITS
mA
mA
mA
mA
mA
mA
NOTES
2
2
2
FEBRUARY 8, 2017
7
6-OUTPUT 3.3V PCIE ZERO-DELAY BUFFER