8V97051L Datasheet, PDF (7/57 Pages) Integrated Device Technology – Low Power Wideband Fractional RF Synthesizer / PLL

8V97051L Datasheet
Pin Description and Characteristic Tables
Table 1. Pin Description¹
Pin
Name
Type
Description
1
SCLK
LVCMOS Input Pulldown Serial Clock Input. High-Impedance CMOS input. 1.8V logic. 3.3V tolerant.
2
SDI
LVCMOS Input
Pullup Serial Data Input. High-Impedance CMOS input. 1.8V logic. 3.3V tolerant.
3
nCS
LVCMOS Input
Pulldown
Load Enable. High-Impedance CMOS input. 1.8V logic. 3.3V tolerant. Active
Low.
4
CE
LVCMOS Input
Pullup
Chip Enable. On logic Low, powers down the device and puts the charge
pump into High-Impedance mode. Powers up the device on logic High.
5
FLSW
Analog
Fast Lock Switch. A connection should be made from the loop filter to this pin
when using the fast lock mode.
6
V_{_CP}
Power
Charge Pump Power Supply. V_{_CP} must have the same value as V_DDA. Place
decoupling capacitors to the ground plane as close to this pin as possible.
7
CP_OUT
Analog
Charge Pump Output. When enabled, this output provides ±ICP to the
external loop filter. The output of the loop filter is connected to V_TUNE to drive
the internal VCO.
8
GND_CP
Ground
Charge Pump Power Supply Ground.
9
GNDA
Ground
Analog Power Supply Ground.
10
V_DDA
Power
11
GNDA_VCO
Ground
Analog Supply. This pin ranges from 3.3V ± 5%. V_DDA must have the same
value as V_DDD.
VCO Analog Power Supply Ground.
12
RF_OUT_A
Output
13
nRF_OUT_A
Output
14
RF_OUT_B
Output
15
nRF_OUT_B
Output
16
V_VCO
Power
17
V_VCO
Power
18
GNDA_VCO
Ground
Clock Output pair A. The output level is programmable.
Clock Output pair A. The output level is programmable.
Clock Output pair B. The output level is programmable.
Clock Output pair B. The output level is programmable.
VCO Supply. This pin ranges from 3.3V ± 5%. V_VCO must have the same
value as V_DDA.
VCO Supply. This pin ranges from 3.3V ± 5%. V_VCO must have the same
value as V_DDA.
VCO Analog Power Supply Ground.
19
V_BIAS
Analog
Place decoupling capacitors (0.1µF) to ground, as close to this pin as
possible.
20
V_TUNE
21
GNDA_VCO
Ground
Control Input to tune the VCO.
VCO Analog Power Supply Ground.
22
R_CP
23
V_COM
Analog
Analog
Sets the charge pump current. Requires external resistor.
Place decoupling capacitors (0.1µF) to ground, as close to this pin as
possible.
24
V_REF
Analog
Place decoupling capacitors (0.1µF) to ground, as close to this pin as
possible.
25
LD
LVCMOS Output
Lock Detect. Logic High indicates PLL lock. Logic Low indicates loss of PLL
lock.
26
MUTE
LVCMOS Input
Pullup
RF_OUT_A and RF_OUT_B Power-Down. A logic low on this pin mutes the
RF_OUT outputs and puts them in High-Impedance.
©2017 Integrated Device Technology, Inc.
7
January 31, 2017