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8735-31 Datasheet, PDF (6/21 Pages) Integrated Device Technology – Selectable differential clock inputs
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8735-31 DATA SHEET
Table 4C. Differential DC Characteristics, VCC = VCCA = VCCO = 3.3V ± 5%, VEE = 0V, TA = 0°C to 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
FB_IN,
CLK0, CLK1
VCC = VIN = 3.465V
150
IIH
Input High Current
nFB_IN,
nCLK0, nCLK1
VCC = VIN = 3.465V
5
IIL
VPP
VCMR
Input Low Current
FB_IN,
CLK0, CLK1
nFB_IN,
nCLK0, nCLK1
Peak-to-Peak Voltage; NOTE 1
Common Mode Input Voltage; NOTE 1, 2
VCC = 3.465V,
VIN = 0V
VCC = 3.465V,
VIN = 0V
-5
-150
0.15
VEE + 0.5
1.3
VCC – 0.85
NOTE 1: VIL should not be less than -0.3V.
NOTE 2: Common mode input voltage is defined as VIH.
Units
µA
µA
µA
µA
V
V
Table 4D. LVPECL DC Characteristics, VCC = VCCA = VCCO = 3.3V ± 5%, VEE = 0V, TA = 0°C to 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
VOH
VOL
VSWING
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
VCCO – 1.4
VCCO – 2.0
0.6
VCCO – 0.9
VCCO – 1.7
1.0
NOTE 1: Outputs terminated with 50 to VCCO – 2V.
Units
V
V
V
Table 5. Input Frequency Characteristics, VCC = VCCA = VCCO = 3.3V ± 5%, VEE = 0V, TA = 0°C to 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
fIN
Input Frequency
CLK0/nCLK0,
CLK1/nCLK1
PLL_SEL = 1
PLL_SEL = 0
15.625
350
700
Units
MHz
MHz
Rev B 7/16/15
6
1:5, DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY CLOCK
GENERATOR
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