89HPES24T6G2 Datasheet, PDF (53/54 Pages) Integrated Device Technology – Support for Max Payload Size up to 2048 bytes

IDT 89HPES24T6G2 Data Sheet
Revision History
January 15, 2009: Publication of final data sheet.
February 11, 2009: Revised AC Timing Characteristics table and DC Electrical Characteristics table to correct typos.
March 6, 2009: Added industrial temperature.
April 7, 2009: In Valid Combinations, changed ZB to ZC silicon for commercial temperature.
February 2, 2010: Added new section Absolute Maximum Voltage Rating with table.
September 13, 2010: In Table 8, changed Buffer type for PCI Express from CML to PCIe differential and changed reference clocks to HCSL.
January 20, 2011: Added new Table 26, Package Trace Length for 19x19mm FCBGA package.
March 30, 2011: In Table 13, added VddPETA to footnote #1.
February 13, 2013: In Table 8, changed P01MERGEN, P23MERGEN, and P45MERGEN pins from pull-down to pull-up.
April 30, 2013: In Table 5, changed description for PxxMERGEN pins to pull-up via 92K ohm resistor.
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April 30, 2013